Lecture 2: Principles of Computers

Introduction

• Continuation from the previous lecture.
• Self-assessment assignments and bonus video available.
• Encouragement to ask questions during the lecture.

Review of Previous Lecture

• Ada Lovelace's idea: Computers represent any data as sequences of numbers
• Simplification: Use non-negative integers to represent more complex numbers.
• Transmission of numbers between computer components using serial digital transfer.
• Simplification: Using a single data wire and ground for binary representation (5V for 1, 0V for 0).
• Importance of timing diagrams for interpretation.

Key Concepts

Fixed Bit Length

• Every bit has a fixed length (delta time).
• Speed described in Baud (symbols per second).
• Receiver measures data line at the midpoint for stability.

Synchronization Issues

• Transmitter and receiver must agree on transfer speed (same Delta).
• Desynchronization can occur if clocks are not aligned.
• Solution: Synchronization required between transmitter and receiver.

Differentiating Idle and Transfer States

• Data lines can be in idle state (floating) or transfer state.
• Three-state logic: 0, 1, floating state for idle.
• Most systems use two-state logic: idle denoted by a constant state (e.g., 0).

Start and Stop Conditions

• Start Condition: Rising edge from idle to start bit.
• Transmission begins with a defined start bit length.
• Stop Condition: Fixed length transfer, end marked by stop bits.
• Overhead: Start and stop bits add to transfer time.

Clock Synchronization

• Introduce a clock line for synchronized transmission.
• Simple Clock Generation: Transmitter generates clock signal.
  • Allows flexible bit lengths.
• Shared Clock: Shared clock signal for both transmitter and receiver.
  • Simplifies design but limits flexibility.

Clock Signal Usage

• Clock signals indicate valid data periods or edges mark data validity.
• Single Data Rate (SDR) vs Double Data Rate (DDR):
  • SDR: Single edge marks data bit.
  • DDR: Both rising and falling edges used for data marking.

Clock Recovery

• Use edges in data signal for clock recovery.
• 8b/10b Encoding: Map 8 bits to 10 bits for frequent signal changes.
  • Ensures enough transitions for clock recovery.
  • 20% overhead but maintains synchronization.

Real-Life Communication Lines

• RS232 (Serial Communication Line): Example of fixed length transfer.
  • Used historically for connecting peripherals like mice.
• I2C: Uses explicit clock signal for communication.
• USB: Utilizes clock recovery techniques.

Duplex Communication

• Simplex: One-way communication.
• Half-Duplex: Alternating direction, single line.
• Full Duplex: Parallel communication in both directions, using two lines.

Out-of-Band Signaling

• Additional signals for urgent information transfer.
• Logical true (1) and false (0) or inverse logic interpretation.

Communication Protocols

• Define data packet structures, e.g., day, month, year from a real-time clock.
• Protocol must be consistent between sender and receiver.

Serial Mouse Example

• RS232 line used, interpreting communication protocol.
• Data sent in 4-byte packets when mouse is moved.

Controller and Library Usage

• Use of RS232 controller to manage communication.
• Controller State: Uses data and status registers to manage byte reception.
• Python PySerial library: Manages communication setup and data reading.

Conclusion

• Overview of principles in computer communication.
• Importance of synchronization and protocol adherence.
• Brief mention of upcoming lecture content.