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Understanding Memory-Mapped I/O in ARM
Sep 4, 2024
Memory-Mapped I/O
Overview
Memory-mapped I/O allows communication between the processor core and peripheral devices.
Each on-chip peripheral has registers (control, status, input/output).
Two approaches for data exchange:
Port-mapped I/O:
Uses special CPU instructions for I/O operations.
Memory-mapped I/O:
Uses native load/store instructions and does not require special instructions.
Advantages of Memory-Mapped I/O
More convenient for interfacing I/O devices.
Example: Setting a GPIO pin to high using the store instruction (STR).
ARM Cortex-M Microprocessors
Use memory-mapped I/O with a 32-bit memory address supporting 4 GB.
Memory space divided into six regions:
Code Region
: Stores program code and data (on-chip flash, max 512 MB).
SRAM
: Stores data (heaps, stacks); can also store code (max 512 MB).
Peripheral Region
: Contains memory addresses for peripherals (e.g., GPIO, ADC).
External Device Region
: Reserved for external devices (e.g., SD cards).
External RAM
: Off-chip memory for large data storage (max 1 GB).
System Region
: Includes NVIC, system timer, etc.
GPIO on STM32L4
Example of memory-mapped I/O using GPIO on STM32L4:
GPIO Port A starts at memory address 48000000 (hex).
Port A has 12 registers, each 4 bytes (total 1 KB reserved, only 48 bytes used).
Registers: MODER (mode register) at lowest address, ASCR (analog switch control register) at highest.
Setting GPIO Pin Output
To set pin 14 of Port A high:
Set bit 14 of the Output Data Register (ODR) to 1.
ODR memory addresses: 48000014 to 48000017 (hex).
Uses little-endian format for byte storage.
Example C statement uses bitwise OR and dereferencing to access and modify the ODR.
Dereferencing in C
Dereferencing a pointer retrieves the value at the memory location it points to.
Asterisk (*) is the dereferencing operator.
Sequence of load, modify, store operations illustrated in C.*
Struct for GPIO Registers
Memory-mapped I/O registers represented as a contiguous block of memory using a struct in C.
volatile
qualifier prevents compiler optimization on variables that may change unexpectedly.
Macro definition for struct pointer (e.g.,
GPIOA
) to improve code readability.
Access ODR using membership operator (dot or arrow operator).
Assembly Language Example
Using EQN directive to define constants for base memory address and ODR offset.
Sequence in assembly:
Load base address into register.
Load ODR value into register.
Modify value.
Store modified value back to ODR.
Further Resources
Visit book website for additional examples and tutorials.
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