this series of videos is about the fundamental principles of dynamic random-access memory DRAM in this particular video you'll learn about the workings of the DRAM memory cell that is the basic unit of storage capable of storing a single binary digit or one or a zero you'll see how data is written to and read from a single memory cell and you'll be introduced to some of the essential concepts of DRAM operation in the videos that follow you'll find out more about the way in which DRAM cells are organized so we can store bytes and words rather than just single bits let's start with the transistor a fundamental component of so many electronic circuits this is the electronic engineer's symbol for a transistor it has three connection points known as the gate the source and the drain when the voltage is applied to the source current is blocked from flowing through the transistor but when a voltage is applied to the gate current can flow through the transistor to the drain lowering the gate voltage again stops the current flow in this sense the transistor is a switch each transistor in a dram chip is only a few nanometers across to make a memory cell the transistors drain is connected to a capacitor a capacitor is an electronic component that can store electric charge you can think of a capacitor as being a bit like a battery but it stores energy in a different way it can't store as much energy as a battery but it can charge up and release its energy much more quickly than the battery capacitance is measured in farad's the capacitance of a dram cell capacitor is tiny about 30 femto farad's that's 10 to the minus fifteen farad's the capacitor is also connected to ground for now you can think of ground as being zero volts but in reality it might not be all voltage measurements are relative in other words a voltage measurement must be compared to another point in the circuit if a component has say three volts across it it means there's a difference of three volts from one side to the other it's this potential difference that drives a current through the circuit and can therefore drive charge onto a capacitor in reality then ground is a reference voltage for other voltage measurements in the circuit you'll see why this concept is important to understanding how DRAM works in a moment now that there's a capacitor connected if the transistor gate is open current can flow through the transistor and the capacitor can charge up it only takes a few nanoseconds that's a few billionths of a second for a memory cell capacitor to reach full charge when the gate is closed the source current is blocked and the capacitor remains charged this is why the transistor in a memory cell is often referred to as a pass transistor when the memory cell is in this charged State it represents a binary one suppose now that the gate of the pass transistor is opened as long as there's no voltage of the source to drive charge onto the capacitor the charge will flow out of the capacitor until eventually it's fully discharged this discharged state of the memory cell represents a binary zero you can see them that reading the contents of a memory cell is a destructive process inside a dram chip memory cells are arranged in a two-dimensional array connected by word lines and two-bit lines in fact there are millions of these cells inside a dram array which typically consists of thousands of word lines and bit lines these arrays are fabricated from metal oxide semi conductors and silicon using a range of advanced lithographic and etching techniques but that's another story here you can see that some of the capacitors are charged in affect these cells contain binary ones and the others contain binary zeros let's suppose we want to read and output the value of this particular cell this relies on some additional circuitry at the end of each bit line known as a sense amplifier in this arrangement each sense amplifier is connected to two separate bit lines this is essential for reasons you'll see in a moment in the bigger picture notice that a row of sense amplifiers divides the DRAM cell array into two sections this is called an open bit line layout there are other ways that a sense amplifier can be connected to two bit lines I'll mention these in another video to determine the value of one particular cell in a row it's necessary to read the entire row first each bit line is pre-charged to a voltage which is about half of the voltage being supplied to the DRAM module as a whole if for example the DRAM supply voltage is 3 volts each bit line is pre-charged to 1.5 volts above ground this voltage is applied only very briefly then it's removed the bit lines are disconnected from ground so they remain charged albeit very briefly rather like capacitors we say the bit lines are allowed to float now the word line is set to a relatively high voltage the word line is said to be asserted the pass transistors are now open if a capacitor is charged up then charge will move from the capacitor onto the bit line it will discharge just a little and the voltage across its bit line will increase just a little if a capacitor is not charged then charge will move from the bit line onto the capacitor it will charge up just a little and the voltage across its bit line will decrease just a little the positive and negative voltage changes on the bit lines shown here with the Greek letter Delta happen in just a few nanoseconds and are in the order of just a few tenths of a millivolt this is because the capacitance of the bit line is much greater than that of a cell nevertheless these voltage differences are enough to be detected by the sense amplifiers the sense amplifiers achieve this by comparing the new bit line voltages with their original values notice that the bit line on the opposite side of each sense amplifier is still charged to 1.5 volts this is why this type of sense amplifier is often referred to as a differential sense amplifier the sense amplifiers include flip-flop latch circuitry that can temporarily store the values that have just been read from the cells one of these values can then be outputs of the data bus if necessary more about that in a later video you can see that reading a row of DRAM cells is destructive to determine if a single cells capacitor is charged up then it and lots of other capacitors must be allowed to discharge at least partially this means that every Reed operation must be followed immediately by a write operation this is also the job of the sense amplifiers according to the original cell values that are now latched into the sense amplifiers each bit line is either raised to the full operating voltage of the DRAM module three volts in this case or it's dropped to ground the original cell values are quickly restored and the word line can now be disengaged now you may be thinking that this is an awful lot of work just to read the value of one cell indeed to simply change the value of one cell an entire row must be first read then rewritten well there's one more feature of DRAM that mitigates this approach it lies in the fact that the that's transistor is not a perfect switch if left to its own devices a mammary cell will leak charge onto the bitline even if the pass-transistor gate is closed for this reason all of the DRAM cells need to be refreshed periodically in other words they all need to be read and rewritten to on a regular basis even if the data isn't required this refresh operation happens for every cell approximately every 64 nanoseconds to summarize so far a dynamic random-access memory cell can store a single binary digit a dram cell consists of a transistor and the capacitor this is easy to miniaturize and it's cheaper to manufacture many cells are connected to word lines and bit lines in a rectangular array a destructive read means that when a cell is read it must be re-written charge leakage also requires that all cells are periodically refreshed hence the term dynamic Ram in the next video of this series I'll talk about the address bus memory addresses and how these are used to select rows and columns from an array I'll also introduce the concept of memory banks and therefore how we can store bytes of data rather than just individual bits