Von Neumann Architecture Lecture Notes

Introduction

• Final video in a series on computer systems
• Focus: Von Neumann architecture

Early Computing Machines

• Fixed-program computers (e.g. desktop calculators)
  • Can only perform specific tasks
  • Changing programs requires rewiring/redesign
• Stored-program computers
  • Changeable programs
  • Jon von Neumann's design (1945)
  • Became known as the von Neumann architecture

Key Characteristics of Von Neumann Architecture

• Central Processing Unit (CPU)
  • Single control unit
  • Arithmetic Logic Unit (ALU)
  • On-board cache (high-speed memory)
  • Internal clock (synchronizes components)
• Instruction Processing
  • Fetch, decode, execute cycle
  • Programs stored in main memory
  • Instructions fetched to registers for processing
• Memory
  • Instructions stored in specific memory locations
  • Each location has an address
  • Processor fetches instructions from memory addresses

Special-Purpose Registers

• Program Counter (PC)
  • Holds memory address of next instruction
  • Increments by one after fetching
• Memory Address Register (MAR)
  • Holds address for data fetch/store
• Memory Data Register (MDR)
  • Holds data fetched from or to be written to memory
• Accumulator
  • Holds results of ALU calculations

Fetch-Execute Cycle Details

Fetch Stage

• Program counter (PC) checked for next instruction address
• Address used by MAR to fetch instruction from main memory
• Instruction brought into MDR
• PC incremented to next instruction

Decode Stage

• Instruction moved to cache
• Control unit decodes instruction

Execute Stage

• Action depends on decoded instruction
• Possible actions:
  • Fetch data from memory and add to accumulator
  • Jump to another instruction
  • Write data from accumulator to RAM

Recap

• Von Neumann Architecture Components
  • Control unit
  • ALU
  • Memory unit
  • Inputs and outputs
• Stored-program concept
  • Both instructions and data stored in binary form in the same memory
  • CPU decodes binary to determine instructions/data
• Registers
  • Program Counter (PC)
  • Memory Address Register (MAR)
  • Memory Data Register (MDR)
  • Accumulator

Advanced Fetch-Execute Cycle Example

• Detailed step-by-step explanation of fetch, decode, and execute stages
• Examples of memory address usage, data transfer, and instruction execution
• Importance of cache in reducing memory fetch times
• Explanation of incrementing program counter and updating registers

Conclusion

• Example program: adds 12 + 23, stores result (35) in main memory
• End of program shown in fetch-execute cycle