Hey, friends welcome to the YouTube channel ALL ABOUT ELECTRONICS. So in the previous video, we have seen that, how to perform the binary division. So in this video, let us see how to design the logic circuit, which can actually perform this binary division. So here the circuit, which we are going to design is purely combinational circuit. And at the end of the video, I will also show you the simulation results for the design circuit. So in the previous video, we have already seen the steps for performing the binary division. So this binary division is basically a repetitive subtraction. So just to quickly revise, here I am taking the same example, which you have covered earlier. So in the division, what we are doing, first we are comparing the divisor with the selected bits of the dividend. So if the divisor is less than the selected bits of the dividend, then we subtract the divisor from the selected bits. And in the quotient we used to write 1, and then in the result we append the next bit of the dividend, and shift the divisor to the right by a 1 bit. And then we repeat the same procedure. But on the other end, if the divisor is less than the selected bits of the dividend, then we do not perform the subtraction, and in the quotient we used to write 0. And then we move to the next step, that is to append the next bit of the dividend. And then we perform the right shift operation on the divisor. So once again the same procedure continues until we go through all the bits of the dividend. So basically this binary division involves the three basic operations. That is compare, shift and the subtraction. So here we can combine the compare and the subtract operation just using the subtraction. So in the subtraction, if the first number is greater than the second number, then the result of the subtraction will be positive. Or in other words, we won't get any borrow at the output. For example, if we subtract this 1 1 1 from 1 1 0 0, then the result after the subtraction will be positive. And hence there is no borrow at the output. But if the first number is less than the second number, then we will get the borrow after the subtraction. For example if we subtract this 1 1 1 from 1 1 0, then this will be the result after the subtraction. And as you can see, we are getting the borrow at the output. So here since the borrow is equal to 1, so we know that the result is negative. So if there is any borrow after the subtraction, then our subtraction is invalid. And simply we need to restore the original value. But if there is a no borrow, then our subtraction is correct. And in that case, there is no need for restoring the earlier value. So that is how we can combine the compare and the subtract operation. Moreover from this borrow bit, we will also get the quotient bits for the each iteration. So if there is no borrow, then our quotient bit is equal to 1. And if there is any borrow, then our quotient bit will be equal to 0. So very soon we will see that, how to implement that. But here using the subtractor circuit, we can easily perform the subtraction. And here a block of 4 bit subtractor is shown. So from this borrow output, we can decide the quotient bits, and we will also get to know whether we need to perform the restoration or not. So for that over here, we also need a control circuit, which can perform this task. So basically this entire block will perform the comparison, and the subtraction. So now let us go one step further, and let us see how to implement it. So in the earlier videos of the adder and the subtractor, we have already seen that how the adder circuit can be used as a subtractor. So basically we have seen that, during the addition, if we take the 2's complement of one number, then that is equivalent of the subtraction. So for example if you want to perform the 4 bit subtraction using the full adders, then here one number is inverted. So basically that is equivalent of taking the 1's complement of that number. So in the 1s complement number if we add the 1, then we will get the equivalent 2's complement number. So here this one is added using the carry input. So for example if you want to perform the 12 minus 7, then we will take the 2's complement of the 7. And then we will perform the addition. So here if we perform the addition, then the result will be equal to 1 0 1 0 1. So basically over here, we will get the carry bit. And we can use this carry as our quotient bit. So in our division, when the subtraction is possible, then the result of the subtraction will be positive. And in that case the quotient bit is equal to 1. So here we can directly use this carry bit as our quotient bit. On the other end if the one number is less than the other number, then the result of the subtraction will be negative. For example if we perform this 10 minus 12, then first we will take the 2's complement of this 12. That is equal to 0 1 0 0. And then if we perform the addition, then the result is equal to 1 1 1 0. So as you can see, there is no carry at the output. So from that we know that, in this case the result is negative. And the same carry bit can be used for the quotient. That means here suppose we are performing the 4 bit subtraction, then the C4 bit can be used as a quotient bit. So now in this circuit we also need to add another circuit, which can restore the original number if the value of the subtraction is negative. And for that we can use the multiplexer. So as you can see for the restoration, with each full adder, one 2 cross 1 multiplexer is used. So here this I0 is connected to the A input. While this I1 is connected to the A minus B input. And this selection input is connected to the carry output of the last full adder in that particular row. So for example, if we have a 4 bit subtractor, then this C4 will get connected to the selection line of the each multiplexer. So this one unit of the full adder and the multiplexer, will act as a one processing unit or the processing block. And if we combine four such blocks, then we can perform the four bit subtraction along with the restore operation. So as you can see over here, the carry output of the last block is given as a selection input for the each multiplexer. So if the carry is equal to 1, then the output of this block will be equal to A minus B. But if the carry is equal to 0, then the output will be equal to A. So in this way, we can perform the subtraction, and the restore operation. Now along with the subtract and the restore operation, we also need to perform the shift operation. So typically in the sequential circuits, the shift operation can be performed using the shift registers. But here since we are designing a combinational circuit, so we will achieve the shift operation by properly arranging this processing units. So here this is the combination divider, which will perform the 4-bit by 2-bit division. That means here the divisor is of 2 bits, while the dividend is of 4 bits. That means here this D3 D2 D1 and D0 are the four bits of the dividend, while the d1 and the d0 are the two bits of the divisor. And of course since our dividend is of 4 bits, so the maximum bits in the quotient will be equal to 4. That means here this Q3 to Q0 represents the quotient bits. And this R2 to R0 represents the three bits of the remainder. So here this each stage, or the each row, represents the one iteration of the division. So when the dividend is of four bits, then at the most we will have 4 iterations. And therefore over here, the circuit consists of four rows. So as you can see this d1 and d0 inputs are connected to the processing blocks of the each row. And they are connected in a such a way that, in each stage or in each row, they are getting right shifted by a one bit position. So here depending on the final carry in the each row, here the each processing block performs either subtraction or the restore operation. And for that, as you can see the final carry in the each row is connected to the selection input of the each multiplexer. And like I said earlier, here this each processing block consists of this full adder, and the multiplexer. So now let us understand the working of the circuit by taking one example. So let's say we want to divide this 1 0 1 0 by 1 1. That means here our divisor is equal to 1 1 and the dividend is equal to 1 0 1 0. That means here this D3 D2 D1 and D0 are 1 0 1 0. While this small d1 and d0 is equal to 1 1. That means here the inputs at all these positions will be equal to 1 1. So now what we will do, we will perform the same division on the right side using the restore method, and on the left side, we will see that how the circuit performs the same operation. So as you know in this restore algorithm, first we will compare the divisor with the first bit of the dividend. So basically we will subtract this 1 1 from the 0 1. And here since the 0 1 is less than 1 1, so the result after the subtraction will be negative. Or in other words, we will get the borrow output. And since we are getting the borrow output, so we will restore the original bits. And therefore in the quotient we will write 0. So the same thing also happens in the first stage of this circuit. So like I said here, the small d1 and d0 is equal to 1 1. While this D3 bit is equal to 1. That means here these two processing units will subtract the 1 1 from 0 1. Or in the 2's complement form, that is equivalent of 0 1 plus 0 1. And that is equal to 1 0. So as you can see, there is no carry after the subtraction. That means here this quotient bit Q3 will be equal to 0. And since the final carry is equal to 0, so the multiplexer will perform the restore operation. And it will restore the 0 1 at the output. That means, the input to the next stage is equal to 1. And here, this D2 input is equal to 0. That means in the next stage if you see, then the one input is equal to 0 1 0, while if you see the bits of the divisor, then that is equal to 1 1. Now on the right hand side in the actual division if you see the second iteration, then in the second iteration, we will bring the next bit of the dividend. And then we will right shift the divisor by a one bit. And once again we will perform the subtraction. So once again since the 1 0 is less than 1 1, so after the subtraction we will get the borrow. And since we are getting the borrow, so in the quotient we will write 0. And once again we will restore the original bits. So the same thing will also happen in the second stage of this circuit. So as we have seen, here the one number is equal to 1 0, while the divisor is equal to 1 1. That means here these two blocks will perform the 1 0 minus 1 1. Or in the 2's complement form, that is equivalent to 1 0 plus 0 1. And that is equal to 1 1. That means here there is a no carry after the subtraction. And therefore the quotient bit Q2 will be equal to 0. And since it is 0, so multiplexer will also perform the restore operation. That means now the multiplexer will restore the 1 0 at the output, that is this value. And now this D1 is equal to 1. So now the one number to the processing block is equal to 1 0 1. And as you know here the divisor is equal to 1 1. That means the second number is equal to 0 1 1. So now the 0 1 1 will subtracted from the 1 0 1. So on the right hand side if you see, then the result of the subtraction is positive. So in the quotient we will write 1. And then we will append the next bit of the dividend. So the same thing will also happen in the third stage. So here these 1 0 1 minus 0 1 1 is equivalent to 1 0 1 plus 1 0 1. And that is equal to 1 0 1 0. So as you can see here, we will have a carry after the subtraction. That means here this Q1 bit will be equal to 1. And since the quotient is equal to 1, so the result of this block will be equal to A minus B, that is equal to 0 1 0. So here this will be the 0, while these two outputs will be equal to 1 0. And as you know, this small d1 and d0 is equal to 1 1. And now this D0 bit is equal to 0. That means here the one number is equal to 1 0 0, while the second number is equal to 0 1 1. So on the right hand side in our division process, if we perform the same subtraction, then we will get 0 1. And since there is a no borrow, so in the quotient we will write 1. So here this 0 1 is the remainder by the 0 1 1 is our quotient. And the same thing also happens in the final stage. So here this 1 0 0 minus 0 1 1 is equivalent to these 1 0 0 plus 1 0 1. And that is equal to 1 0 0 1. So as you can see here this carry output is equal to 1. That means here this Q0 output will be equal to 1. And since it is equal to 1, so the output of this last block will be equal to A minus B. Or in this case that is equal to 0 0 1. That means here the remainder is equal to 0 0 1. And if you see the quotient bits, then that is equal to 0 0 1 1. So in this way this circuit performs the binary division. So now let me show you the same thing in the simulation. So as you can see, here each block consists of the full adder and the multiplexer. And here the divisor bits are inverted only once. So here these four bits represents the quotient bits, while these two bits represents the divisor bits. And here the four bits of the dividend are applied through this switch. And as you can see, here these three bits represents the remainder bits. So here just to see the result of the reminder, these three outputs are connected over here. So now let me just run the simulation, and let me show you the output. So initially this B1 B0 for the divisor bits are set as 0 1, while the dividend bits are set as 1 0 0 1. That means here the divisor is equal to 0 1, while the dividend is equal to 1 0 0 1. So in that case as you can see, the quotient is also equal to 1 0 0 1, while the remainder is equal to 0. So now let me just make this divisor is equal to 1 1. So now our divisor is equal to 1 1, while the dividend is still equal to 1 0 0 1. So as you can see another quotient is equal to 1 1, while the remainder is still equal to 0. So in this way we are getting the correct result. So now the dividend is set to 1 0 1 1. So in that case, now this circuit should perform 1 0 1 1 by 1 1, that is 11 divided by 3. So in that case as you can see, now the quotient is equal to 1 1, that is 3 in the decimal when the remainder is equal to 1 0. So in the decimal that is equal to 2. So once again we are getting the correct result. And now let me just change the dividend to the 1 1 1 1. That means now our dividend is equal to 15, while the divisor is equal to 3. So in that case our quotient should be equal to 5. So as you can see over here, the quotient is equal to 1 0 1. So in the decimal that is equal to 5. And here the remainder is equal to 0. So now if I just change the divisor to 1 0, then this circuit should perform the 15 divided by 2. So in that case as you know, the quotient should be equal to 7, while the remainder should be equal to 1. so as you can see over here, now the quotient is equal to 111, while the remainder is equal to 1. So in this way this circuit performs the 4 bit by 2 bit division. So in this circuit, since our dividend is of 4 bits, so we will have 4 rows. That means here the number of rows in the array is equal to the number of bits in the dividend. Now the second question is in each row how many processing units we need to add. Now since the divisor is of two bits, so in the first two stages we will have only two units. And after that in each stage we will have one more unit. That means as you can see, in the last two stages we will have three units. So in this way we can design a divider circuit which can perform the 4 bit by 2-bit division. So similarly this is the 5 bit by 3 bit divider circuit. So here the dividend is of 5 bits. And since it is of 5 bits, so we will have total five rows. Moreover since the divisor is of 3 bits, so the first three stages or the first three rows we'll have only three units. And then after in the next two rows, we will have one more unit. That means if you see the fourth and the fifth row, then it will have four units. And as you can see in this additional units the input is equal to 0. So in this way we can design this divider circuit. So this type of array divider are also known as the fast divider. But as you can see, as the number of bits in the division increases, then the required number of processing blocks will also increase exponentially. So typically for the division the sequential division circuits are used. And in the future videos we will also cover that. But I hope in this video, you understood how to design a logic circuit, or the combinational circuit, which can perform the binary division. So if you have any question or suggestion and do let me know here in the comment section below. If you like this video hit the like button, and subscribe our channel for more such videos.