Hey, friends welcome to the YouTube channel ALL ABOUT ELECTRONICS. So in this video, we will learn about the decoder. And the following topics will be covered in this video. So the decoder is the combinational circuit, which has the N inputs and M outputs. And depending on the input combination of the N inputs, only one output is high at the given time. Now, since the input to the decoder are the binary inputs, so for the N different inputs, we have total 2 to the power N and different combinations. And therefore, for the N different inputs, we have at the most 2 to the power N outputs. That means the maximum value of the M can be equal to 2 to the power N. So this 3 to 8 decoder and, 4 to 16 decoders are the few examples, where M is equal to 2 to the power N. For example, in this 3 to 8 decoder, we have 3 inputs and 8 outputs. And as you can see, here this M is equal to 2 to the power 3. so here, depending on the input combination, at any given time only one of the eight outputs is high. Similarly in case of the 4 to 16 decoder, we have 4 inputs and 16 outputs. So once again over here, this M is equal to 2 to the power 4. So these are the few examples, where the output M is equal to 2 to the power N. But in some decoders, the number of outputs is less than 2 to the power N. For example, in this BCD to decimal decoder, we have 4 inputs and 10 outputs. So in this case, this M is less than 2 to the power 4. So in general for the decoder we can say that, it has the N inputs and M outputs. And here this M is less than or equal to 2 to the power N. So depending on the input combination, at any given time, only one of the output is high. So now let us see the few applications of the decoder. So the first application is the code conversion. For example, this 3 to the 8 decoder, can be used for converting the 3 input binary number, into the equivalent octal number. That means when the input is equal to 0 0 0, then this D0 will be high, And likewise when all the inputs are 1, then this output D7 will be high. Which is the equivalent octal representation of 1 1 1. So in this way, it can be used for the binary to octal conversion. Likewise, this BCD to decimal decoder, can be used for converting the BCD number, into the equivalent decimal number. So in this decoder, the 4 bit BCD number will be the input. And depending on the input number, the equivalent decimal output will be high. For example, for the BCD input 1 0 0 0 the output D8 will be high. On the other end, for the input 0 1 0 0, the D4 output will be high. So in this way, the decoder circuit can be used for the code conversion. And the next application is the address decoding. So typically, in the processor, multiple memory chips are used to increase the overall memory. Now to access all these different memory chips, the decoder circuit is used. So here let's say, each memory chip is of 256 bytes. So using the 8 address lines, we can access any of the 256 bytes. And using this 2 to 4 decoder, the individual chip can be selected. So the two input lines A9 and A8 is given as an input to this decoder. And the output of the decoder, enables the memory chip. So depending on these two bits, one of the four memories will get selected. For example, when this A9 and A8 both are zero, then the memory one will get selected. And depending on this A0 to A7 bits, any other 256 bytes of this memory one can be accessed. Likewise, when the A9 is equal to one, and the A8 is equal to zero, then the memory 3 will get selected. And using this A0 to A7, any of the 256 bytes of this memory 3 can be accessed. So in this way, the decoder is very useful in the address decoding. Similarly, the decoder is also used for generating the control signal. So as you can see over here, depending on the two inputs, any one of the four output of the decoder will get high. And these outputs can be used to control some peripheral device, or some internal functions. So in this way, the decoder is very useful for generating the control signals. Apart from that, it can also be used for implementing the different logic circuits. So by comparing the different outputs of the decoder using the OR gate, we can implement the different logic circuits. So at the later part of the video, I will show you that, how to implement the specific logic circuit, using this decoder. But these are the few applications of the decoder. All right, so now let us see the design or the logic circuit of the decoder. And first of all, let us start with 3 to 8 decoder. So in 3 to 8 decoder, there are total 3 inputs and 8 outputs. And depending on the input combination of these 3 bits, only specific output will get high. So from the truth table of this decoder, we can easily design the logic circuit. For example this D0 is high, when both A B and C are zero. That means D0 is equal to A bar dot B bar dot C bar. Likewise, this D3 is high, when A is 0, and B and C are 1. That means algebraically, this D3 is equal to A bar dot B dot C. And likewise these D7 is equal to A dot B dot C. So from this truth table, we can easily implement the logic circuit for this 3 to 8 decoder. So as you can see this logic circuit, here we require total 8 AND gates. And each AND gate will require 3 inputs. So using this logic circuit, we can easily implement the three to eight decoder. Now typically, the decoder also has one more input. That is the enable input. Now this input can be active high, or active low. But here during our discussion, we will assume that this enable input is the active high. So this active high means, when the enable input is high, then only the decoder will get enabled. So when this enable input is low, and irrespective of the input combinations, the output of the decoder will remain low. On the other end, in the active low enable input, exactly reverse happens. That means, whenever the enable input is low, and the decoder will get enabled. And whenever the enable input is high, then irrespective of the input combinations, the output of the decoder will remain zero. So with this active high enable input, this is the truth table of the three to eight decoder. So as you can see, when the enable input is low, or the logic zero, and irrespective of the input combinations, the output of the decoder remains zero. And the decoder will get enabled, only when this enable input E is equal to 1. And this is the logic circuit of the decoder with the enable input. So as you can see, the circuit is similar to the 3 to 8 decoder. But now, there is one more input to the AND gate, that is the enable input. So similarly, we can also design the 4 to 16 decoder. But in that case, we will require 16 AND gates. Moreover the each AND gate will have 4 inputs. And if you also consider the enable input, then each AND gate will have 5 inputs. That means the design of this 4 to 16 decoder, will be very similar to the 3 to 8 decoder. But now, let's see the design of the BCD to decimal decoder. So this BCD to decimal decoder, is the trimmed version of the 4 to 16 decoder. So similar to the 4 to 16 decoder, this decoder also has 4 inputs. But instead of 16 outputs, this has only 10 outputs. That is from D0 to D9. So as you know, in case of the BCD code, we have total 10 valid combinations. while the remaining 6 combinations are the don't care terms. So for the 10 different input combinations, only one of the 10 outputs will be high. And for any invalid input, the output of the decoder will remain low. So here is the truth table of the BCD to decimal decoder. So as you can see, when the enable input is low, then irrespective of the inputs, the output of the decoder will remain low. And when the enable input is high, then for the 10 different valid input combinations, one of the 10 outputs will become high. So from the truth table, we can easily implement the logic circuit. So this is the logic circuit of the BCD to decimal decoder. So as you can see, each AND gate consists of 5 inputs. The 4 inputs are A B C and D. And the last input is the enable input. So from this logic circuit as you can see, as we go for the higher order decoders, like 5 to 32 or 6 to 64 decoders, then the number of inputs to each AND gate will also increase. And as the number of inputs to the AND gate increases, then the cost and the complexity of the design will also increase. So in such case, we can construct the higher order decoders, with the help of the lower order decoders. So let's see that. And first we will see that, how to construct the 4 to 16 decoder, using the 3 to 8 decoders. Now if you see in the 4 to 16 decoder, then we have total 16 outputs. So whenever we are designing it using these 3 to 8 decoders, then we will require two such 3 to 8 decoders at the output side. Because this 16 divided by 8 is equal to 2. That means each decoder will provide eight outputs. And using two such decoders, we will get total 16 outputs. That is from D0 to D15. Now if you come on the input side, then each decoder has three inputs. So on the input side, what we will do? Starting from the LSB we will connect the first three inputs line to each decoder. And the remaining one line, will be used for selecting the particular decoder. Now this particular scheme will work, when each decoder has the enable input. So without the enable inputs, we cannot construct the higher order decoders, using the lower order decoders. Alright, so now the remaining last line or the MSB will be used for selecting the particular decoder. So as shown in the figure, the last input is given to the enable input of two decoders. So this A3 input, is directly connected to the enable input of the second decoder, while it is connected to the first decoder, using the NOT gate. So when this A3 is equal to 0, then the output of the NOT gate will become high. And therefore the first decoder will get enabled. And based on the three inputs A0 A1 and A2, any one of the eight outputs will become high. On the other end, when the A3 is equal to one, then the second decoder will get enabled, while the first decoder will be off. And based on these inputs A0, A1 and A2 we will get any output from D8 to D15. So in this way, by using the two 3 to 8 decoders, we can construct the 4 to 16 decoder. Similarly, using the two 2 to 4 decoders, we can construct the 3 to 8 decoder. So to construct the 3 to 8 decoders, we require total eight outputs. And for that we required two such two to four decoders on the output side. So in this way, we will get the total output from D0 to D7. Now on the input side, since the each decoder consists of two inputs, so starting from the LSB, the first two input lines are connected to both decoders. And the last input line, or the MSB is used for selecting the particular decoder. So as you can see, the A2 is connected to the first decoder via NOT gate, while it is directly connected to the enable input of the second decoder. So when this A2 is equal to 0, then the first decoder will get enabled. And based on the inputs A0 and A1, any one of the outputs between D0 to D3 will become high. Similarly, when the A2 is equal to 1, then the second decoder will get enabled. And based on the first two lines, any one of the outputs between D4 to D7 will become high. So in this way, we can construct the three to eight decoder, using the two, two to four decoders. Similarly let's see one more example, and let us see how to construct the 5 to 32 decoder, with the help of 3 to 8 decoders. So as you can see, this 5 to 32 decoder, consists of 32 outputs. So if you want to construct it using the 3 to 8 decoders, then we will require 4 such 3 to 8 decoders on the output side. So using 4 such 3 to 8 decoders, we can get total 32 outputs. Now on the input side, since each decoder has the three inputs, so starting from the LSB, connect first three lines to the each decoder. That means these A0 A1 and A2 are connected to the input lines of the decoder. And the remaining two lines that is A3 and A4 will be used for the selecting the particular decoder. So here using the two lines, we need to select four decoders. So for that, we can use two to four decoder. So here this A3 and A4, are connected to the two inputs of this two to four decoder. And the output of this decoder, is connected to the enable signal of each of the 3 to 8 decoder. And of course, over here the enable input of this 2 to 4 decoder, should be high. So whenever these A4 A3 is 0, then the first decoder will get enabled. Likewise when this A4 A3 is equal to 0 1 then, the second decoder will get selected. And whenever this A4 A3 is equal to 1 0, then this third decoder will get selected. That means using this last two input lines, that is A3 and A4 we can select any one of the particular decoder. And with the help of this A0 A1 and A2, we can select the one of the eight output lines of the given decoder. So in this way, we can construct this 5 to 32 decoder, using 4 such 3 to 8 decoders, and one 2 to 4 decoder. Now suppose let's say, we have only 3 to 8 decoders, and this 2 to 4 decoder is not available, so in that case also using only 3 to 8 decoders also, we can construct the 5 to 32 decoder. So when this 2 to 4 decoder is not available, in that case, for selection, also we should use this 3 to 8 decoder, instead of 2 to 4 decoder. So basically, here we should use this 3 to 8 decoder, as 2 to 4 decoder. And to use it as 2 to 4 decoder, here the A2 line, is connected to 0. That means the MSB of this 3 to 8 decoder, is connected to the zero. That means depending on this A1 and A0 line, only lower four outputs of this three to eight decoder will be high. So in this way, by connecting the MSB of the decoder to the zero, we are only using the lower 4 outputs of the decoder. And those 4 outputs can be connected to the enable signal of the 4 decoders. And of course, here the enable signal of this selection decoder should be kept high. So in this way, we can construct the 5 to 32 decoder only using the 3 to 8 decoders. So in general using this technique, we can construct any higher order decoders, using the lower order decoders. All right, so now let's see the last application of the decoder, that is for the logic circuit implementation. And to understand that, let's take one simple example. So let's say we want to construct the full adder circuit, using the decoder. So earlier we have already seen the truth table of the full adder circuit. So as you can see from the truth table, the full adder has three inputs. That is the two inputs A and B, and the one input is the carry in. So if you want to implement it using the decoder, then you will require three to eight decoder. Now if you see this truth table, then here the sum output is high for the four different input combinations. And likewise, the carry output is also high for the four different input combinations. Now here, the each input combination represents the specific minterm. Similarly in the decoder if you see, the specific output represents the particular minterm. So if we want to implement any logic circuit using the decoder, then we need to perform the OR operation of all the mean terms, for which the output of the logic circuit is high. Or in other words, we need to combine all the outputs of the decoder, for which the output of the logic circuit is high. So for the sum outputs, here we need to combine this D1 D2 D4 and D7. Likewise the carry output is high, for the mean term M3 M5 M6 and M7. That means here we need to combine the four outputs D3 D5 D6 and D7 to the OR gate. So in this way, we can implement any logic circuit using the decoder. So let's take one more example. So let's say, we want to implement the three bit event parity checker using the decoder. So earlier, we have already seen the even parity checker. And this is the truth table of the even parity checker. So as you can see, the output of this parity checker is one, when the number of ones in the input is equal to odd. So here, the output is one for the four different input combinations. Or in other words we can say that, the output is one for the four different minterms. So if you want to implement it using the decoder, then here for the three inputs, once again we will require three to eight decoder. And here, the output of the parity checker is 1, for the minterms 1,2,4 and 7. So here, we will combine the four outputs of the decoder, that is D1 D2 D4 and D7, to the OR gate. And that will be our even parity checker circuit. So in this way., we can implement any logic circuit or the logic function using the decoder. Now sometimes, the output of the logic circuit is high, for so many min terms. So in that case, we need to combine all those min terms using the OR gate. For example, let's say this is the truth table of some logic circuit. So as you can see, here the output is one for the six different input combinations. So if you want to implement this logic circuit, using the decoder, then we require the OR gate with the 6 inputs. But as you know, as the number of inputs to the logic gate increases, then the cost and the complexity of the circuit will also increase. So in that case, what we can do, we can use the multiple OR gates. So here, the one OR gate combines the three outputs, while the second OR gate combines the remaining three outputs. That is the D5 D6 and D7. And then, the output of these two OR gate is once again combined, using the one more OR gate. So as the number of output increases, then we can use this method. So in such situation, the second easy way, is to use the NOR gate instead of, the OR gate. And that is particularly useful, when the output of the logic circuit is high, for more than half of the possible input combinations. So in this case, as you can see we have total eight different input combinations. But here, the output is high for the six different input combinations. Which is more than the half of the input combinations. So in this case, what we can do, instead of combining the ones, we can combine the zeros, using the NOR gate. So here, we will combine the D3 and D4 using the NOR gate. So basically, here we are combining the complement terms. And since the NOR gate, is the OR gate followed by the NOT gate, so the output will once again will get complemented. So effectively after this NOR gate, we will get our desired output Y. So in this way, when so many number of inputs are high, then instead of combining the ones, we can combine the zeros, using the NOR gate. And still, we can generate the desired output. So in this way, we can implement any logic function using the decoder. So I hope in this video, you understood the basics of the decoder, as well as the different applications of the decoder. So if you have any question or suggestion, then do let me know here in the comment section below. If you like this video, hit the like button, and subscribe the channel for more such videos.