welcome back to basic electronics in this class we will continue our discussion um of clamper circuits we will consider a circuit which provides a negative level shift we will then see how a clamper and a peak detector can be combined to make up a voltage doubler circuit with the help of the concepts we have learnt we will solve an interesting problem and get further insight into diode circuits so let us start let us look at another ah clamper circuit is quite similar to the previous one except now the polarity of the diode is ah reversed and everything else ah is the same and first we will consider the ideal diode model with v on equal to zero volts v s of t is still the same v m sin omega t and v m is five volts so v s is varying between five and minus five volts and note that the polarity of V c is now plus here and minus here. Once again we will make a few observations and then relate that to the graphs that we will see. First when D conducts the capacitor charges instantaneously this point is really no different than the previous circuit and that is because R on is small and therefore R on time c which is the time constant E is also small and in this phase V D is equal to 0. So, therefore, V C plus 0 minus V s is equal to 0 and therefore, we get V c equal to V s. Second point V c can only increase since a decrease in V c would require the diode to conduct in the reverse direction and this point again is the same as our previous circuit except the polarity of the capacitor voltage and the polarity of the diode are now reversed.
So, this point the second point means that V c can go on increasing up to a maximum and then stay constant and that is what this is after V c reaches its maximum value which turns out to be V m, it cannot change any further and we then have V o of t which is V s minus V c equal to V s minus that constant which is V m and this is a negative level shift. So, V s minus V m so that is a negative level shift and that is where this circuit is different than the previous one. Let us now look at the plots. now in the beginning our capacitor voltage is zero and v s starts increasing over there and ah since v s comes across the diode and that is a positive bias the diode starts conducting and therefore the capacitor starts charging and as we have seen the capacitor starts instantaneously so we see becomes equal to V s.
So, V c which is the green line and V s which is the blue line coincide here and the red one is the output voltage and because the diode is conducting in this phase it has 0 volts across it and therefore, the output voltage is 0. And at this point V c has already reached its maximum and that is V m which is equal to 5. So, subsequently V c is going to stay at that value like that and then we have this equation to describe V o of t which is V s minus V m. So, if this is V s our V o is simply a level shifted version of V s and note that the shift is now downward. here is the same circuit as the last slide except we now have a v on of point seven volts and let us quickly go through the results in this case in the last ah circuit v c reached a maximum of five volts and stayed there in this case it does not quite do that it goes up to four point three volts and stays constant and ah let us go through the observations that we went through earlier and relate those to the graphs when d conducts the capacitor charges instantaneously once again since the time constant is small as in the last circuit and in this phase we have v c plus v on minus v s v c plus v d which is v on since the diode is conducting minus v s equal to zero and that gives us v c equal to v s minus v on Second point, V C can only increase because a decrease would call for the diode to conduct in the reverse direction which is not possible.
Third point, after V C reaches its maximum value and what is the maximum value now? What is the maximum value of V S that is equal to V M which is 5 volts. So, the maximum value of V C is V M minus V ON which is 5 minus 0.7 which is 4.3. After V c reaches its maximum value it cannot change anymore for the same reasons we discussed earlier and we then have V o of t is equal to V s of t minus V c V s minus V c which is V s minus V m plus V on. So, it turns out to be V s minus 4.3 volts earlier this was minus 5 volts and now it is minus 4.3 volts.
So, that is really the only difference and in this case the output voltage gets clamped to 0.7 volts that value there is 0.7 volts and earlier if you remember it was 0 volts. So, not much difference really except for the small changes because of V ON. We have seen how a clamper works, we have also seen how a peak detector works. We can put these together to make a voltage doubler circuit also called the peak to peak detector.
So, this figure shows the basic idea behind this combination. The input voltage is sinusoid from minus V m to plus V m as shown here. The output of the positive clamper that is this circuit which provides a positive level shift is from 0 to 2 V m and it is otherwise identical to the input voltage. So, the input voltage just gets a shift and it now goes from 0 volts to 2 V m and now the peak detector detects the peak of this voltage and what is the peak of this voltage this is 0 this is 2 V m so the peak of this waveform is 2 V m. So, the output of the peak detector is then expected to be a DC voltage of 2 V m.
So, in other words from a sinusoid going from minus V m to V m we have generated a dc voltage which is double ah the amplitude so two times v m and that is why this circuit is called this combination is called a voltage doubler here is an implementation of the voltage doubler this first part consisting of c 1 and d 1 is a positive clamper it provides a positive shift and we have seen this earlier the second part consisting of D 2 and C 2 is a peak detector and we have also looked at this circuit earlier and now let us look at the waveforms V i V 1 and V o to see how this circuit works here are the waveforms for the case where V on for the diodes is 0 volts that is 0 volts. we have ideal diodes the blue curve is the input voltage the green curve is V 1 that is also color coded so that is blue that is green and output voltage is in the pink color and as we have seen before V 1 is just a level shifted version of V I and it is clamped at 0 volts So, it goes from 0 to 2 V m if the input goes from minus V m to plus V m. The peak detector simply detects the peak of this waveform the green waveform which is V 1 and the peak is this level here and that is 2 times V m or 2 times 10 in this example which is 20 volts. it is interesting to note that it takes a few cycles for the output voltage to build up to the steady state in practice of course we are only interested in this part and we really dont care about what happens in the beginning but ah if you are curious its a good idea to plot the diode currents and the capacitor voltages ah and try to figure out why it is taking so many cycles to reach the steady state the circuit file for this ah example is available and ah you are encouraged to run the simulations ok now let us look at the case where v on is point seven volts and as we have seen before the positive clamper now clamps v one at minus point seven volts rather than zero volts in the earlier case and therefore v 1 does not go to 2 v m but it goes to 2 v m minus 0.7 volts also the peak detector does not detect the peak of v 1 but it its output is the peak of v 1 minus 0.7 so we have two diode voltage drops involved and therefore the output the pink line here is 2 v m which is 20 volts minus 1.4 volts and that is the circuit file available to you to run this simulation and look at the various waveforms. Let us now consider this circuit with two diodes, it is somewhat similar to the clamper circuit that we have seen earlier.
The difference is In those circuits we had only one diode here we have two diodes. So, in the clamper circuit the capacitor voltage could only increase because there was no path for the capacitor to discharge. This situation is different we have a charging path for the capacitor through this D 1 and there is also a discharging path for the capacitor through D 2 like that.
ok let us look at the problem statement now here is the input waveform going from minus v m to plus v m this could be say minus ten volts to plus ten volts the high interval that means the interval in which the voltage is high is marked as t one over here and the low interval is marked as t two and the i v relationship for the diode is given over here so when the diode conducts it has a voltage drop of 0.7 volts and for any voltage less than 0.7 volts it does not conduct the current is 0. Here is the problem statement assuming R 1 c and R 2 c to be large compared to t find V o of t in steady state V o is the output voltage here. What are these quantities R 1 c and R 2 c? Let us look at this circuit.
The charging path is like that. So, we see that the charging time constant is the product of R 1 and C. So, R 1 C is the charging time constant. What about discharging? The discharging path is like that and therefore, R 2 times C is the discharging time constant.
This problem does appear to be somewhat complicated, but we have two simplifying Factors 1 we are dealing with steady state that means periodic steady state and second these time constants are given to be large compared to t and that means that they are large compared to t 1 and t 2 as well and this will have implications for our analysis as we will see. Let us now make a few observations about this circuit and then write equations and figure out what V o of t should be. Charging time constant tau 1 equal to R 1 C as we already seen, discharging time constant tau 2 is R 2 times C and since T 1 since tau 1 and tau 2 are both much greater than T the period of the input waveform we expect V C to be nearly constant in steady state. and why is that what is the meaning of tau 1 much larger than T so that means if the capacitor is charging for example that charging process is going to be very slow so that means in this time the capacitor voltage will hardly change it is going to charge so slowly that we will not even notice the difference in ah this interval similarly If the capacitor is discharging we will not really notice any difference in one interval like T 2 because it will discharge so slowly over several cycles.
So, because of that we can say that the capacitor voltage in steady state can be treated as a constant and let us denote that constant by V c with a superscript 0. and now we can get back to V o of t what is V o of t it is V i minus V c. So, V o of t is V i of t minus V c of t and the huge simplification that is made possible by this assumption is that the capacitor voltage is a constant. So, therefore, our steady state output voltage is simply the input voltage minus this constant. V c with a superscript 0 the steady state value of the capacitor voltage.
So, let us look at an example and verify that these actually happen and then we will derive an expression for V o of t in steady state. Here is an example the input voltage is going from minus 10 to plus 10. that means our V m is 10 volts, T 1 the interval of high input voltage is given to be 0.25 milliseconds and T 2 the interval of low input voltage is given as 0.75 milliseconds. The other component values are R 1 equal to 5 k, R 2 equal to 10 k, the turn on voltage of the diode is 0.7 volts and the capacitance is 10 microfarads. Now let us check whether the condition given in the problem statement that is R 1 C and R 2 C being very large compared to T 1 and T 2 is valid or not.
What is R 1 times C? 5 k times 10 microfarads, so that is 50 milliseconds and 50 milliseconds is surely large compared to any of these numbers. What about R 2 times C?
10 k times 10 micro so that means 100 milliseconds and that 2 is large compared to T 1 and T 2. So, the condition stated in our problem is indeed valid. About the capacitor voltage we said that we expect V c to be approximately constant and that is observed over here and what is that value this is 0 volts. this is minus 5. So, V c is about minus 2 volts.
Now to proceed further let us look at V c in an expanded form. Here is the capacitor voltage as a function of time and we see that it is nearly constant, but not exactly constant it varies between about minus 1.9 volts to minus 1.84 volts. and during this interval when the input voltage is high the capacitor voltage rises and that corresponds to charging of the capacitor through D 1. During this interval in which the input voltage is low the capacitor voltage decreases and that corresponds to discharging of the capacitor through D 2. and note that our capacitor voltage waveform is periodic This value is the same as the V c value after one period that is this one and that is the meaning of periodic steady state. Let us now look at the capacitor current that is what it looks like and notice that it is consistent with our comments so far about the charging and discharging of the capacitor.
During this interval when the capacitor is charging I c is positive and during this interval when the capacitor is discharging I c is negative. Let us try to understand why there is a charging phase and a discharging phase in the first place. So, let us consider this situation in which V i is constant equal to plus V m. So, we do not have these changes we just have a constant V m as the input voltage just a DC voltage and what do you expect to happen initially there will be a capacitor current, but as t tends to infinity as we approach the steady state all voltages will become constant.
So, therefore, V c will become constant c dv c dt which is i c will become zero and the capacitor will look like an open circuit there would not be any voltage drop over there and the entire input voltage v m would then appear across the capacitor so this end of the capacitor would be at v m and this other end of the capacitor would be at zero So, in other words V c would have become equal to V m. So, that is exactly what is happening in the charging phase. So, the capacitor voltage is trying to go all the way up to plus V m in this phase.
Of course, it does not quite happen because we then have this transition of the input voltage and so therefore, the discharging starts. ok now we want to find ah the value of v c approximately assuming its nearly a constant and ah for that purpose we will use charge conservation we have come across this concept also when we discussed r c circuits and it has to do with periodic steady state and ah what the situation we have here is periodic steady state everything is periodic state V C I C V I V O. In particular the charge on the capacitor is also periodic and we are going to use that to figure out what V C should be. So, what is the charge the change in the charge on the capacitor in one period it is 0 to T I C d t that is because I C is d Q d t.
and this we can split into two parts integral over 0 to t 1 this phase and integral from t 1 to t 1 plus t 2 that is this phase and these two together should add up to 0 because we do not expect any change in the capacitor charge between 0 and t equal to capital T. And we can see in this figure that it is actually happening this area which is the first integral is positive because this is our 0 and the second integral is this area and that is negative and it turns out that they are equal in magnitude and opposite in sign so they add up to 0. Ok, so next what is I c in this interval it is V m minus V c this is plus V m minus V c and minus V on the voltage drop across R 1 and that divided by R 1 that is our I c. that is because the charging path is like that and that is a constant nearly a constant because V c is nearly a constant.
Now so therefore, the integral is simply that constant multiplied by T 1 so that is what this term says. What about I see in the discharging phase that current? Let us find the voltage drop across R 2 in the discharging phase and that will give us the current that we are looking for.
So, let us see what this node voltage is first. this is minus v m when the capacitor is discharging so minus v m minus v c so this node is at minus v m minus v c so the voltage drop between these two nodes is zero minus minus v m minus v c that is this entire voltage drop here and from that we need to subtract the voltage drop across the diode d two which is v on so that is what we have done over here so that gives us the voltage drop across r 2 and that divided by r 2 will give us the current now it is a simple matter of solving this equation for v c let us take v c on one side and we get t 1 by r 1 plus t 2 by r 2 times v c here and everything else on the other side and that gives us the value of V c and for this example with them with the numbers given here V c turns out to be minus 1.86 volts and of course it agrees well with our simulation results once we know v c we know v o as well because v o is simply v i minus v c so v o is going to be v i minus minus one point eight six volts so v i plus one point eight six volts so that is a positive shift of v i so this is our v i the blue light blue curve and v o is ah the same as v i except for a a positive shift of 1.86 volts. In summary we have seen how voltage doubler works we have also considered an interesting diode circuit which could be analyzed using the concepts involved in the clamper and peak detector circuits.
In the next class we will see how diodes can be used in rectification that is conversion of an AC voltage to a DC voltage until then.