Lecture Notes

Introduction

• Discussion on lecture start delay and online hearing issues.
• Emphasis on not using Language Learning Models (LLMs) for assignments.
• Encouragement to seek expert feedback, not generic comments.

Instruction Set Architecture (ISA)

• ISAs are the interface between software and hardware.

• Components of ISA:

  • Memory Organization
  • Address Space and Addressability
  • Registers
  • Set of Instructions
    • Opcodes
    • Data Types
    • Addressing Modes
    • Instruction length and formats

Opcodes

• Trade-offs in Opcode Design
  • Large vs. Small sets of opcodes
  • Impact on hardware complexity
• Examples of Complex Opcodes
  • Multiply and Accumulate
  • Streaming SIMD Extensions
• LC3 and MIPS Opcode Types
  • LC3: Operate, Data Movement, Control
  • MIPS: R Type, I Type, J Type

Data Types

• Supported Data Types
  • LC3: Two’s complement integers
  • MIPS: Two’s complement, unsigned integers, and floating point
• Arithmetic Systems
  • Example: Two’s complement
• Trade-offs
  • Hardware complexity vs. Software complexity
  • Supported Data Types = Faster Operations

Semantic Gap

• Definition: Closeness of ISA to high-level languages
• Complex vs. Simple Instructions
  • Complex: Reduce semantic gap, larger instructions
  • Simple: Increase semantic gap, primitive operations

Addressing Modes

• Mechanism for specifying operand location
• Types in LC3
  • Immediate or Literal
  • Register
  • Memory Addressing (e.g., PC-relative, Indirect, Base+Offset)
• MIPS Addressing
  • Base+Offset, Immediate
• Trade-offs
  • More addressing modes simplify software, complicate hardware

Operate Instructions

• LC3: NOT, ADD, AND (Binary operations on two’s complement)
• MIPS: R Type, I Type, F Type
• Example of implementing NOT using XOR

Data Movement Instructions

• LC3 Load/Store Instructions
  • PC-relative, Indirect, Base+Offset, Immediate Addressing Modes
• MIPS Load/Store with Base+Offset
• Instructions are used for initialization without memory access

Control Flow Instructions

• Allow programs to execute out of sequence
• Conditional Branching in LC3
  • Uses condition codes (N, Z, P)
• Conditional Branching in MIPS
  • Branch if Equal instruction
• Trade-off in complexity (LC3 vs. MIPS branch implementation)

Conclusion

• Complexity in ISA influences both hardware design and software efficiency.
• Different ISAs offer different sets of instructions and addressing modes, each having its own trade-offs.