Hey friends, welcome to the YouTube channel ALL ABOUT ELECTRONICS. So in this video, we will learn about the multiplexer. And we will cover the following topics.
So the multiplexer is the combinational circuit which has the M inputs and 1 output. Apart from that, it also has the N selection lines. So this is the block diagram of the.
multiplexer. But many times it is also represented in this fashion. And in fact in this video, we will use this second representation. So in the block diagram representation, this multiplexer is often referred as MUX. So if the multiplexer has n selection lines, then the total number of inputs to the multiplexer is equal to 2 to the power n.
Or in other words, If the multiplexer has m inputs, then the total number of selection lines are log m to the base 2. So that is the relationship between the number of inputs and the selection line. So depending on the input combinations at the selection line, only one of the n inputs is available at the output. That means the inputs at the selection line decides which input will be available at the output. So depending on the number of inputs and the number of selection lines. we have different types of multiplexers.
Like 2 line to 1 line multiplexer and 4 line to 1 line multiplexer. So in case of the 2 line to 1 line multiplexer, we have 2 inputs and 1 output. And to select any one of the 2 inputs, we have 1 selection line. Similarly, in case of the 4 line to 1 line multiplexer, we have 4 inputs and 1 output. And to select any one of the 4 inputs, we have 2 selection lines.
Similarly, we can also have a 8 line to 1 line multiplexer or 16 to 1 multiplexer. So the question is, where this multiplexer is used? So typically, when the channel resources or the channel bandwidth is limited and when we want to share the resources with multiple users, then this MUX is very useful. Typically, it is used in the analog and the digital communication systems for time division.
multiplexing. For example, depending on the inputs at the selection line, the data of only one user will be available at the output. And with time, by changing the inputs to the selection line, the data of the different users can be put on the output side. So in this way, the same channel bandwidth or the channel resources can be shared with the multiple users using the multiplexer. Apart from that, The multiplexer can also be used for implementing different Boolean functions.
So at the later part of the video, we will also see that how to implement different logic functions using the multiplexer. But first, let us see the logic circuit of the multiplexer. And for that, let us start with 2 to 1 MUX.
So as I said, this 2 to 1 multiplexer has 2 inputs and 1 output. And to select any one of the 2 inputs, it has one selection line. So whenever this S is equal to 0, then this D0 input is connected to the output.
So if this D0 is 0, then the output of the multiplexer will be 0. And when this D0 is 1, then the output of the multiplexer will be 1. Likewise, when S is equal to 1, then the D1 input will get connected to the output. That means if the D1 is 1, then the output will be 1. And whenever this D1 is 0, then the output of the multiplexer will be 0. So this is the overall truth table of the 2 to 1 multiplexer which covers all the different possibilities of D0, D1 and selection line. And this is the simplified truth table of the 2 to 1 mux which shows that when S is 0, then the output is connected to D0 and when S is 1, then the output is connected to D1. And this is the algebraic equation of the same. So using this algebraic expression, we can easily design the logic circuit.
And this is the logic circuit of the 2-to-1 multiplexer. So as you can see, the D0 and D1 inputs are applied to the two AND gates. And the second input to the AND gate is the selection input. So here, the output of the two AND gates are logically ORed using the OR gate.
So this is the logic circuit of the 2-to-1 multiplexer. Similarly, Let us see the logic circuit of the 4 to 1 multiplexer. So in case of the 4 to 1 multiplexer, there are 4 inputs and 1 output. And to select any one of the 4 inputs, there are 2 selection lines. So depending on the inputs to the selection line, any one of the input is connected to the output.
And this is the truth table of the 4 to 1 multiplexer. So as you can see, when both S0 and S1 are 0, then the D0 gets connected to the output. Likewise, when both S1 and S0 are 1, then these D3 inputs get connected to the output. And from the truth table, we can easily write the algebraic expression of the multiplexer.
And with the help of this algebraic expression, we can design the logic circuit for this 421 multiplexer. So this is the logic circuit of the 421 multiplexer. So as you can see, in the algebraic expression, we have total 4 product terms.
And therefore, we require total 4 AND gates in the logic circuit. And since each product term contains 3 variables, so each AND gate requires 3 inputs. And using the 4 input OR gate, all the product terms can be logically ORed. Likewise, we can also design the 8 to 1 multiplexer. So in 8 to 1 multiplexer, we have 8 inputs and 1 output.
And to select any one of the 8 inputs, there are total 3 selection lines. And this is the truth table of the 821 multiplexer. So as you can see, as the number of inputs to the multiplexer increases, then we also require AND gates and OR gates with more inputs.
For example, in 821 multiplexer, we require 8 4-input AND gates and 1 8-input OR gate. So in such case, we can use the small multiplexers to design the large multiplexer. For example, this 821 multiplexer can be designed using the 421 multiplexer. Now since the 421 multiplexer has 4 inputs, so to design this 821 multiplexer, we require two such 421 marks.
Now these each 421 marks has two selection lines. So starting from the LSB, connect first two selection lines to the both multiplexers. That means here, these S1 and S0 are connected to both multiplexers. Now to select any one of the outputs from these two multiplexers, we require one more MUX. So in this case, we can use the 2 to 1 MUX to select any one of the two outputs.
And the selection line S2 is connected to this 2 to 1 MUX. So in this way, we can design this 8 to 1 MUX using two such 4 to 1 MUX and one 2 to 1 MUX. So as you can see from the truth table of the 8 to 1 MUX.
When the selection input is 100, then this differ input should get connected to the output. So in this case also, when the selection inputs are 100, then this differ input should get connected to the output. So let's see that. So when these S1 and S0 both are 0, then the first inputs of both multiplexers will get connected to the output. That means here, The output of the first multiplexer will be equal to D0, while the output of the second multiplexer will be equal to D4.
Now in case of the 1 0 0, the last selection input S2 is equal to 1. That means the second input of these 2 to 1 mugs will get connected to the output. So in this case, this D4 input will be available at the output. So in this way, this circuit will work as 8 to 1 mugs.
Likewise, we can also design this 8 to 1 mux only using the 2 to 1 multiplexers. So let us also see that, so this 2 to 1 mux has only 2 inputs. So if we want to design this 8 to 1 multiplexer, then we require 4 such 2 to 1 mux.
And using these 4 multiplexers, we can apply the required 8 inputs to the multiplexer. Now here, each 2 to 1 mux has one selection line. So starting from the LSB, connect first selection line to each multiplexer. So here, this S0 is connected to each multiplexer. Now these 4 multiplexers will have 4 outputs.
So to select any one of the 4 outputs, we can use 421 MUX. And as shown in the diagram, the remaining two selection lines, that is S1 and S2 are connected to this 421 MUX. So, this design also will work as 8 to 1 mugs.
But suppose if we want to design this 8 to 1 mugs only using the 2 to 1 mugs, then we need to design this 4 to 1 mugs using the 2 to 1 mugs. So for that, we require 3 more 2-to-1 marks. So this 4 line to 1 line multiplexer has 4 inputs.
So if you want to design it using the 2-to-1 marks, then we require 2 multiplexers. That means the 4 inputs of the 4-to-1 marks is given to these 2 multiplexers. And to select any one of the 2 outputs of these 2-to-1 marks, we require 1 more multiplexer.
So here, the selection line S1 is connected to these two multiplexers, while the selection line S2 is connected to the last multiplexer. So this is the overall circuit of the 821 mugs. So as you can see, using total 7 such 221 mugs, we can design this 821 mugs.
Now in this 821 mugs, when the selection input is 0,0,0, then this D0 input should get connected to the output. So let us see that how the same thing happens over here. So, when this S0 is equal to 0, then the first inputs of all the multiplexers will be available at the output. That means these D0, D2, D4 and D6 will appear at the output.
Now in the next stage, when this S1 is also 0, then once again the first inputs of these two multiplexers will be available at the output. So in this case, these D0 and D4 will be available at the output. And these two will be the input to the last multiplexer. Now here, since the S2 is also zero, so once again, the first input of this multiplexer will be available at the output.
So in this case, this D0 will be available at the output. That means whenever all the selection inputs are zero, then this D0 will be available at the output. So in this way, this circuit will work as a 8 to 1 MUX.
Likewise, we can also design 16 to 1 multiplexer using 4 to 1 multiplexers. So here, to provide the 16 inputs to the multiplexer, we require 4 4 to 1 MUGs. And once again, to select any one of the 4 outputs, we require one more multiplexer. So in the first input stage, starting from the LSB, the first two selection inputs S0 and S1 are connected to all the MUGs. And in the next stage, the remaining two selection lines, that is S3 and S2 are connected to the last multiplexer.
So in this way, we can design the large multiplexers using the small multiplexers. Alright, so as I said earlier, the multiplexer can also be used for implementing different logic functions. So let us see that how it can be used for implementing different Boolean functions.
So we have already seen the logic circuit of the multiplexer. So in this case, this is the logic circuit of the 4 to 1 mux. And as you can see, if we apply the input variables to the selection line, then we can get all the mean terms of the function. For example, suppose if we apply the inputs A and B to this selection line, then we will get all four mean terms of the two variable function.
And using this individual data line, we can select the particular mean term. So, in this case, since we have 4, 2, 1 marks, so it has two selection lines. So, using this, we can implement any function with two variables.
That means the two inputs a and b can be applied to these two selection lines. That means now, this output y is equal to a bar dot d bar dot d0 plus a bar dot d dot d1 plus a dot d bar dot d2. plus a dot b dot d3.
So now this individual mean term can be selected using the data lines. That means by making these data lines either 1 and 0, we can select the particular mean term. So let us understand it using the one example. So let's say we have one three variable function and this is the truth table of that function. So as you can see this function is one for the four different input combinations.
Or we can say that the function is one for the four different min terms. That is m0, m2, m3 and m7. So in the sum of product form, this is how we can represent that function.
So here, since it is a three variable function, so we require a multiplexer with the three selection lines. Or in other words, we require the 8 to 1 marks. So here, the three inputs a, b and c are applied to the three selection lines. So, this A is applied to the S2, while the B is applied to S1. And likewise, this C is applied to the S0.
So now, each data line represents the particular mean term. For example, this D0 represents the M0, while this D7 represents the mean term M7. So by applying either 1 and 0 to the particular data line, we can select the particular mean term.
So in this case, the mean terms M0, M2, M3 and M7 are present in the function. So as you can see, here the data lines are present. d0, d2, d3 and d7 were kept high and the remaining data lines were kept low.
So in this way, we are able to select only 4 min terms. And in this way, we can implement any given function. So in this method, to implement the n-variable Boolean function, we require the multiplexers with n selection line.
For example, if we want to implement any 3-variable Boolean function, then we require the multiplexers with 3 selection lines. Or in other words, we require the 8 to 1 mux. But there is another method, where to implement the n variable Boolean function, we require the multiplexers with n-1 lines. So for example, if we have a 3 variable Boolean function, then it can be implemented using the 4 to 1 mux.
And as you know, this 4 to 1 mux has only 2 selection lines. So in this method, during the implementation, Starting from the LSB, the first n-1 lines are connected to the selection lines. And the last variable or its complement is connected to the data lines. So let us take the earlier example and let us see how we can implement the same 3 variable Boolean function using the 4 to 1 mux.
So here the variables a and b are connected to the selection line S1 and S0. While the last variable c or its complement will be connected to the data line. So let us see how to connect the variable C to the data lines.
So now, since we have two selection lines, so we have total four different possibilities for the two variables. And for each possibility of the variable A and B, we have total two possibilities for the variable C. For example, when both A and B are 0, then the C can be 0 or C can be 1. So for those two possibilities, let us see the value of the function f. And from that, let us find the relationship between the function f and the variable c. So with a and b is equal to 0, when c is 0, then the function f is equal to 1. And when this c is equal to 1, then the function f is equal to 0. So we can say that when the variable a and b both are 0, then the function f is the complement of the c.
That is, f is equal to c'. And therefore, this d0 should be connected to the c'. Similarly, let us find the value of d1, when this a is 0 and b is 1. So as you can see, when a is equal to 0 and b is equal to 1, then irrespective of the value of c, the function f is equal to 1. So we can say that with a is equal to 0 and b is equal to 1, this function f is equal to 1. And therefore, this D1 should get connected to the 1. Likewise, with a is equal to 1 and b is equal to 0 irrespective of the value of c, the function f remains 0. Therefore, this D2 should be connected to the 0. And likewise, with both a and b is equal to 1, when c is equal to 0, then this f is equal to 0. And when c is equal to 1, then this f is also equal to 1. So, we can say that the function f is following the variable c.
Or we can say that the f is equal to c. Therefore, this d3 should be connected to the c. So in this way, using these 4-to-1 marks, we can implement any 3-variable Boolean function.
So let us take one more example, so that it will get clear to you. So let's say, this is the 4-variable Boolean function, which we want to implement it using the multiplexer. So, this is the truth table of the given Boolean function. And since it is the 4 variable function, so it can be implemented using the A to 1 mux.
And as you can see, this A to 1 mux has 3 selection lines. So, the first 3 inputs A, B and C are connected to the selection lines. And the last variable D or its complement will be connected to the data lines.
So, once again for the each combination of the variable A, B and C, We have total 2 possibilities of the variable D. So whenever this a, b and c are 0, then for D is equal to 0. the function f is equal to 0 and for d is equal to 1, the function f is equal to 1. That means in this case, the function f follows the variable d. Or we can say that this f is equal to d.
That means here, this d0 should get connected to the d. Likewise, with abc is equal to 0, 0, 1, when this d0 is equal to 0, then the f is 0 and when this d is 1, then the f is equal to 1. That means once again, this f is equal to d. And therefore, this d1 should get connected to the variable d.
Likewise, with abc is equal to 010, irrespective of the value of d, the function f remains 0. And therefore, this f is equal to 0. That means this data line d2 should get connected to the 0. Likewise, with abc is equal to 011, when this d is 0, then f is 1 and when this d is 1, then f is 0. So, we can say that the function f is the complement of the variable d. And therefore, this d3 should get connected to the d'. Likewise, with abc is equal to, the function f follows the d. And therefore, this d4 should get connected to the variable d.
Likewise, with abc is equal to, Irrespective of the value of D, the function F remains 0. And therefore, this F is equal to 0. That means this D5 should get connected to the 0. Similarly, with ABC is equal to 110, the function F is equal to D', and this D6 should get connected to the D'. And finally, for this ABC is equal to 111, irrespective of the value of D, the function F remains And therefore, this D7 should get connected to the 1. So in this way, we can implement any Boolean function using the multiplexer. So similarly, in the next video, we will see that how to implement different logic gates using the multiplexer. But I hope in this video, you understood about the multiplexer. So if you have any question or suggestion, then do let me know here in the comment section below.
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