SystemVerilog Functional Coverage and Bins

Jul 28, 2024

Notes on SystemVerilog Functional Coverage and Bins

Introduction

  • Overview of defining bins in SystemVerilog functional coverage.
  • Recap of definitions from the last video: Bin, Cover Point, Cover Group.

What are Bins?

  • Bins are used to track/record occurrences of specific value in a cover point expression.
  • Example: For a 2-bit logic variable, possible values are 0 to 3 (total 4).
  • Auto Bins: If not defined explicitly, the simulator defines bins ranging from 0 to 3 automatically.

Auto Bin Max

  • Default Auto Bin Max is 64.
  • When variable size is less than or equal to 64:
    • Independent bins created.
  • When variable size exceeds 64 (e.g., 8-bit variable, which has 256 possible values):
    • Grouping occurs.
    • Example of grouping: 256 values / 64 = 4 groups (bins 0-3, 4-7, etc.).

Cover Group Definition

  • Structure for defining a cover group in SystemVerilog.
  • Example Cover Group:
    covergroup CG @(posedge clock);
        coverpoint X;
        coverpoint Y;
    endgroup
    
  • Can redefine Auto Bin Max using option.auto_bin_max.
    • Can be set globally for the cover group or individually for cover points.

Explicit Bins Definition

  • For example, defining 2-bit variables X and Y:
    • Total bins would equal 4.
  • Explicitly define cover points and bins:
    covergroup CG;
        coverpoint X {
            bins b0 = 0;
            bins b1 = 1;
            bins b2 = 2;
            bins b3 = 3;
        }
        coverpoint Y;
    endgroup
    

Scalar and Vector Bins

  • Scalar Bins Syntax:
    • bins b0 = {0};
    • Individual values covered by separate bins.
  • Vector Bins Syntax:
    • bins b = {[0:3]}; // covers numbers from 0 to 3.

Ranges in Vector Bins

  • Ranges can be defined using the $ symbol.
  • Example: For 4-bit variable, range from 0 to 15 would be defined as:
    bins b = {[0:$]} 
    

Example Code

  • Example module defining cover groups:

    module example;
        logic [3:0] X;
        logic [1:0] Y;
        covergroup CG @(posedge clock);
            coverpoint X;
            coverpoint Y;
        endgroup
    endmodule
    
  • This will automatically create bins as per the variable size.

  • Running the code produces:

    • 16 auto bins for variable X.
    • 4 auto bins for variable Y.

Coverage Results

  • Coverage can be reviewed after executing the code:
    • If values are covered multiple times, the coverage percentage increases.
    • Adjusting the sample counts (e.g., from 50 to 10) affects results (drops coverage).

Conclusion

  • Understanding invocation and creation of auto bins.
  • The mechanisms of groups vs. independent bins based on the variable sizes.
  • Detailed insights into weighted coverage will be discussed in later videos.

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