- [Craig] This video is the final in a series of three in which we explore the purpose, key components and architecture of a computer system. In this video, we take a look at the von Neumann architecture. (uplifting piano jingle) The earliest computing machines had fixed programs. For example, a desktop calculator is an example of a fixed-program computer. It can do mathematics, but it cannot be used for any other purpose. Changing a program of a fixed-program machine requires rewiring or redesigning the machine. A stored-program computer is one that has changeable programs. In 1945, the mathematician and physicist Jon von Neumann described the first design for modern computers that had stored programs. This way of designing computers became known as the von Neumann architecture. A von Neumann architecture has key characteristics. It has a central processing unit, a CPU with a single control unit. Inside, it has an arithmetic logic unit, an ALU. On-board cache, which is small amounts of high-speed memory that helps the control of instructions and data around the CPU. And also an internal clock, which provides a pulse at a constant rate to sychronise components. This architecture computer fetches, decodes and executes instructions. This isn't the most efficient design for processing, but it was indeed simple. Programs are made up of a sequence of instructions, stored in the main memory, outside of the CPU. They are fetched, one by one, to the registers for processing. Let's have a closer look at the memory. You will notice that each instruction is stored in a location in the memory, and each location has an address. Therefore, the processor can fetch an instruction stored in memory address one, for example, and bring it back into the processor. Now, computers are complex machines capable of fetching and executing instructions billions of times a second, using a very methodical sequence of events inside the CPU. In order to do this, they make use of special-purpose registers, which we introduced in the last video. Let's take a look at each one and see what it's used for. The program counter always holds the memory address of the next instruction to be executed. Once we've fetched this address from the program counter, we increment its contents by one so it points to the next instruction to be executed. The memory address register holds the address of where data is to be fetched from or stored into. The memory data register holds any data which has been fetched from memory or is about to be written to memory. The accumulator holds the results of calculations which have been performed by the arithmetic logic unit. Let's look at a typical fetch-execute cycle in a little more detail. So, we start with the fetch stage. The program counter is checked, as it holds the address of the next instruction to be executed. This address is used by the memory address register in order to fetch the instruction needed from main memory and bring it back into the memory data register. The address in the program counter is incremented to point to the next instruction. Now, the instruction is in the CPU, the control unit decodes the instruction to see what has to be done. Now we know what to do, we can execute the instruction. What we actually do depends on what the instruction actually is. We could be asked to head back to main memory, fetch some data and add it to the accumulator. We could be asked to jump to another instruction. We could be asked to write data held in the accumulator back into RAM. So, let's just recap what we've covered so far. The von Neumann architecture consists of a control unit, arithmetic logic unit, memory unit and inputs and outputs. It is based on the concept of the stored-program concept. Both instructions data and program data are stored in the same memory in binary form. There is no way to know if the pure binary held in memory is representing instructions or data simply by looking at it. It has to be brought into the processor and decoded. And it contains the following registers: the program counter, holding the address of the next instruction to be executed in memory; the memory address register, holding the address of where data is to be fetched or stored; the memory data register, holding the data fetched from or to be written to memory; and the accumulator, holding the result of calculations. What comes next is technically a little beyond what you need to know for the GCSE exam, so there's no need to take notes on the rest of this video. However, if you're looking for a slightly deeper level of understanding, this next section will really help bring together everything we've covered in the last three videos and is excellent bridging knowledge for the A Level. So, in the final section of this video, we're going to follow through the various stages of the fetch-execute cycle to see exactly how the program instructions stored in memory locations one through four are carried out in the CPU. So, we start with the fetch cycle. The program counter is checked, as it holds the address of the next instruction to be executed. The address is copied into the memory address register. The address goes down the address bus, and the contents held in address one are sent along the data bus and end up in the memory data register. So, that was the contents "Load Address 5", and you can see that's come back and is now inside the MDR. The contents of the program counter are incremented to two to point at the address of the next instruction, and we've now ended fetch. Now, we're on decode. The first thing we do is take a copy of what's just been loaded into the CPU and place it into the cache. This means if we need this instruction again soon afterwards, we don't need to go back to main memory to get it. The control unit now decodes the instruction - that's "Load 5". It discovers it needs to load the contents which are stored in memory address five, so we update the memory address register with address five. We're now done decoding the instruction. We now execute the instruction and pass address five down the address bus. We then return the contents of address five, which is the value 23, down the data bus and place it into the memory data register. We copy the value from the memory data register into the accumulator. A copy of the value 23 is, again, placed in the cache in case it's needed again. Note that although the contents of the registers are being overridden, the cache is normally larger, so it can hold multiple items. We have now finished our first fetch-execute cycle, so we're onto the next. And of course, we start with fetch. The program counter is checked, as it holds the address of the next instruction to be executed. The address is copied into the memory address register. The address goes down the address bus. The contents held in address two are sent along the data bus and end up in the memory data register. So this time, it's the content "Add Address 6" that's ended up back in the MDR. The contents of the program counter are incremented from two to three to point to the address of the next instruction to be executed. We've now ended the fetch part. Again, a copy of what's just been loaded into the CPU is placed into the cache. The control unit now decodes this instruction, "Add 6". It discovers it needs to add the contents which are stored in memory address six to the value we currently have in the accumulator, which is 23. So, we update the memory address register with address six. We're now done decoding the instruction. We now execute the instruction and pass address six down the address bus. We then return the contents of address six, which is the value 12, down the data bus and place it into the memory data register. We store a copy of the value 12 in the cache in case we might need it again soon. We now add the value in the memory data register, that's 12, to the value held in the accumulator, which is 23, and we override the contents with the result, 35. This calculation is performed by the arithmetic logic unit. We've now finished the second fetch-execute cycle, and it's time to start the third. The program counter is checked, as it holds the address of the next instruction to be executed. The address is copied into the memory address register. The address goes down the address bus. The contents held in address three are sent along the data bus and end up in the memory data register. The contents of the program counter are again incremented, to four this time, to point to the address of the next instruction to be executed. Again, we've now ended the fetch part. A copy of what's just been loaded into the CPU is again placed in the cache. The control unit now decodes the instruction. We discover we need to store the contents of the accumulator into memory address six. So, we update the memory address register with the address six and we copy the value in the accumulator, 35, into the MDR. We're now done decoding the instruction. We now execute the instruction and pass the address six down the address bus. We pass the value 35 down the data bus. This value ends up in address six and overwrites the contents which were there, 12. As usual, we take a copy of the result of the calculation, 35, and place it in the cache, in case we need it again in the future. We've now finished the third fetch-execute cycle. We're on our final fetch-execute cycle now, and again, the program counter is checked, as it holds the address of the next instruction to be executed. The address is copied into the memory address register. The address goes down the address bus. The contents held in address four are sent along the data bus and end up in the memory data register. The program counter is incremented to five to point to the address of the next instruction to be executed. Again, we've ended the fetch part. A copy of what's just been loaded into the CPU is placed into the cache. Now, at some point, you might be thinking to yourself the cache is going to fill up, and of course, it will and the CPU will need to decide what to get rid of. The control unit now decodes this instruction, and we discover the instruction fetched from memory is to end the program, so we're now done with decoding. We execute the instruction and end the program. This program is now complete. This program did the sum 12 plus 23, and we stored the result, 35, back into main memory. (uplifting piano jingle)