[Music] now now we'll come to the first stage so if you remember a while back two slides back we were discussing these are the stages right so first we need to do our design and timing setup so what do I mean by design and timing setup you have got different there are two parts to it one is design setup one is timing setup okay so when I say design set up if you don't look at this slide or if you look at the slide I want inputs from you people what do you mean by design setup come okay what files is what do you need constraints death floor planning because you could have done a to pass flow of synthesis you remember to pass synthesis law right you take certain information from the place and route tool you passed it back to your synthesis tool to better to do a better synthesis right so you can potentially have already a flow planning information coming from this synthesis tool which with which it already used right if it doesn't make sense to you I'll cover this in the next slide again what does to pass synthesis okay so essentially what in design setup what do we mean if we are doing place and route we have certain standard cells what do you mean by standard cells these are the cells provided by the boundary to you these have specific Heights they have specific they have certain functionality they you get very specific kinds of standard cells Aoi o or and nan muxes right and then claw buffers they're very defined standard cells which you get you get their apps you get their abstracts when I say abstract it's a layout with all the information with only the information which is required for routing I'm not diving into these details because we have covered then or we'll cover them probably in the later sessions okay so we have something called cells which we get from the boundary we get their logical information when and in logical we get their and a B bar that's its logic we get this timing information if it it gets an input at certain time what's the delay right that's the timing if it gets the input at a certain slope what's the delay if it's loaded using a capacitor or certain value what's the delay okay that's the timing information then the physical information is the abstract use for it just the metal routing on top which is enough for the router really dive into that okay then there are technology files dot T is not is metal out exactly so if you are doing a design that design has different metal layers what are the expected widths what is the spec pitch all those input spacing we knew with all the design rules associated are in the dot technology file okay then there are RC model files called PLU plus it tells the RC it has our C look-up tables for this metal wiring okay now that information the standard cell information and the gate level netlist now where does this come from the gate level netlist comes from the synthesis tool okay then there is this information at the bottom there's constraints timing constraints are given to the synthesis tool and then it outputs of time constrain MCM M is multi corner multi mode we will look into what that means little bit again today then there is floor planning information this car this is due to the fact that we are we might have done too fast synthesis we look what that mean again there is power intent how do you define the power grid how do you take outputs or tap the power grid that's in the UPF s then there is can chain this can chains art for your design for test DFT if you don't know that means please know just note this down okay so all this information goes into a block some in ICC two we define something called a block and that information at the bottom to go into a block if definition the top all the technology information goes into the D lip okay now there are hard arrows and then their dotted arrows any ideas why I would have made two kinds of arrows over here hard arrows mean is once I have created or once I have initialized say a delay or a block or something hard arrows mean that locally in the ICC to environment the tool will have a copy of this available to it okay but dotted arrows mean that every time you call for these things the technology file is a standard cells the N diems what does NDA mean we look in the next slide the tool will actually go to the reference part and will bring up the information it does not create a local copy for all this so mostly for the technology information the tool will not create a local copy for all the design related information it does create a local copy okay one more time okay so the information at the bottom over here right these constraints load plant power information scan chain gate level netlist all these you usually have locally available so if you initialize a design and ICC to these will for sure be going to a block definition in ICC two and the tool will create a local copy of it now once you have initialized the design if you delete where this was actually present the tool does not care it has a local copy of it tries to do it for this technology file in RC but this is an alternative method usually what is done is these all the technology related information is converted into something called NDM so these are called new data model energies all the technology is usually passed through in diems okay the tool does not create a local copy so if you delete the source where these Indians are present the tool will not know what to do so this is just a structure and you should know all these because this is frequently used in interviews okay this is effectively what is required for an ICC to tool to do your design now we saw here this is this end IAM new data model libraries these are essentially for all the technology related information okay so first when we trying to do the design setup we will create these these are either provided by the foundry or you create them now in the ICC two tool you create okay I think people are getting lost so I will go back to the slide here again where are we design and timing setup so which part are we doing first design setup in the design and timing setup we are looking specifically into design setup design setup has two kinds of information one coming from the foundry one coming from the designer synthesis site okay all this goes into ICC now we want to look at how the foundry information is present okay form the information is roughly divided into these there is timing in power information from Dedes in the dot DB format there is physical information that is left GDS frame Flinn Dara's frame only in diems this is used to be an old format just remember that there used to frame only Indians there is RC models the T lu+ then there is dot technology technology dot TF we already looked at all this right in the previous light all these information you take all this information you open your ICC compiler ICC - compiler into LM shell library manager shell you pass it and it creates a nd M cell library okay I want the reason I'm showing this it all this is done inside your ICC - you're creating a library people ask you what doesn't you mean you should know it is a way to present your information such that it is easy for the ICC to when it is running your PNR flow to use n diems are nothing but a collection of information such that it will be easy for the PNR tool to use that information there is nothing special in it okay it is just a collection of all listen it is a database it is a very specific way in which specifically structured database there is nothing special in an Indian now if you'll take all this information and you want from the other side you'll pass the design related information necklace there is DC Def and UPF and all that goes into the ICC - compiler now here if this is same thing which I mentioned IC compiler and the end iums are usually in dot c lips and DM cell libraries are created by merging low logical and physical models we saw this there is technology file logical libraries physical libraries after after you have created the end IAM you will not be required to have this so once you have this end IAM library you do not need this information okay that's present in a database separately as nd M there's nothing reason I am putting this in like five slides again and again again and again is because these terminologies are very important from your interview perspective what does BB dot TF every one of these things you should actually know what was this this was designed set up okay then there is something called timing setup like Facebook page YouTube channel for more such updates thank you for watching be expert by expert loss of life