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Understanding Quantization in ADCs
Sep 27, 2024
Lecture Notes on Quantization and ADC
Overview
Today's class builds upon the previous discussion of sampling issues, focusing on the operation of quantization.
The flow of the course includes:
Understanding ADC (Analog-to-Digital Converter) at a block level.
Exploring the math behind sampling and quantization.
Evaluating ADC performance and characterization.
Discussing circuit-level implementations.
Key Concepts
Quantization
Quantization is the process of discretizing the amplitude axis of a signal.
Incoming signal ranges from
-V_reference
to
+V_reference
.
Instead of storing all possible amplitudes, the range is divided into a finite number of segments (levels).
Each level is represented by a specific amplitude value.
Example: With 8 levels, 3 bits are needed to represent them (since 2^3 = 8).
Input-Output Characteristic
The input signal spans from
-V
to
+V
(denoted as Full Scale Range, FSR).
If quantizing into 4 levels, the step size (Δ) is calculated as:
Step size (Δ) = Total Range / Number of Levels = (2V) / 4 = V / 2.
Normalization is done with respect to the step size for easier analysis.
Quantization Error
Quantization error occurs as a result of rounding off the input signal to the nearest quantization level.
The quantization error (Q) can be modeled as the difference between the quantized output (V) and the actual input (Y):
Q = V - Y.
This results in a
non-linear operation
, as the output does not scale linearly with the input.
Types of Quantizers
Mid-Rise Quantizer:
No quantization level at zero (even number of levels).
Mid-Tread Quantizer:
At least one quantization level at zero (odd number of levels).
Characteristics of Quantization Noise
The quantization error is often treated as a random signal (noise) under certain assumptions.
Assumptions made:
Quantization noise is independent of the input signal.
The probability density function (PDF) of the quantization noise is uniform within the range of ±Δ/2.
Signal to Quantization Noise Ratio (SQNR)
SQNR is a key metric for assessing ADC performance.
Formula for peak SQNR for sinusoidal signals:
SQNR (dB) = 6n + 1.76, where n is the number of bits.
Example: For a 10-bit ADC, maximum SQNR is about 61 dB.
Effective Number of Bits (ENOB)
ENOB quantifies the effective resolution of an ADC beyond just the number of bits.
ENOB is important for determining actual performance despite circuit nonidealities.
Practical Considerations
The quantization noise power is derived as:
Noise Power = Δ² / 12.
Effective resolution and SQNR calculations are made under sinusoidal signal conditions.
Frequency domain analysis is emphasized for accurately measuring signal and noise power when using quantizers.
Conclusion
Quantization is a crucial operation in ADCs, with significant implications for signal processing.
Understanding quantization errors and noise is essential for designing effective ADC systems.
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