COMMS 10015 Computer Architecture - Week 5 Lecture 4

Introduction

• Focus on applying general concepts of instruction set architecture (ISA) design to ARMv7a.
• ARMv7a is version 7 of ARM ISA, specifically the A (Application) profile.
  • General-purpose usage (e.g., mobile phones, laptops).
  • Contrasts with ARMv7M for embedded computing.
• ARMv7a is implemented in real microarchitectures like ARM Cortex-A7.

ARMv7a Architecture Overview

• RISC Philosophy: ARMv7a generally follows RISC but has deviations.
• Load-Store Architecture: 32-bit word size.

State Specification

• Register File:
  • 16-entry general-purpose register file.
  • Registers referred to by index (R0-R15) or human-readable form (A1-A4).
  • Some registers have special roles (e.g., R15 is the program counter).
• Special Purpose Registers:
  • CPSR (Current Program Status Register) and SPSR (Saved Program Status Register).
  • CPSR controls and inspects execution (e.g., processor mode, flags N, Z, C, V).
  • MRS and MSR instructions are used to access CPSR.
• Memory Model:
  • Byte addressable, 2^32 address space (4GB total).
  • Alignment and Endianness:
    • Instructions must be aligned to 4-byte boundaries.
    • Instructions are little-endian; data can be little or big-endian.

Instruction Specification

• Encoding and Decoding:
  • Fixed-length (32-bit) instruction encoding.
  • Complex with multiple formats, mostly three-address format.

Instruction Classes

1. Data Processing (ALU):

   • Arithmetic operations (e.g., addition) can update CPSR flags.
   • Flexible second operand allows operand computation.

2. Data Movement:

   • Register to register or immediate to register moves.
   • Single-shot and multi-shot memory accesses.
   • PUSH and POP instructions for stack operations.

3. Control Flow Management:

   • Branch (B) and Branch and Link (BL) instructions (immediate and computed variants).
   • Program counter in general-purpose register file allows computed branches.
   • Predicated Execution:
     • Every instruction is conditionally executed.
     • Predicates add suffix to instruction identifier (e.g., BNE for "not equal").

Conditional Execution

• Uses CPSR flags for conditional operations.
• Example of optimizing GCD function using predicated execution.

Summary

• ARMv7a bridges theoretical concepts and real-world applications.
• Relevant for understanding end-to-end computer functionality.
• Many devices use ARMv7a, highlighting its practical significance.