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[Lecture 22] Understanding Interconnects in Computer Architecture

Apr 9, 2025

Computer Architecture: Lecture 22 - Interconnects

Overview

  • Topic: Introduction to interconnects in computer systems.
  • Importance: Interconnects are critical in determining the performance and scalability of computer systems.
  • Relation to Memory: Interconnects play a significant role in memory systems as well.

Key Concepts

Multiprocessing Fundamentals Recap

  • Memory Ordering: Ensures consistency in data access.
  • Cache Coherence: Techniques discussed include Snoopy buses and directory-based systems.
    • Snoopy Bus: Caches monitor a shared bus to maintain coherence.
    • Scalability Issue: Effectiveness reduces as the number of cores increases.
    • Directory-Based: Involves consulting a directory for memory access.

Interconnects

  • Types: Can be on-chip or within entire systems (e.g., supercomputers).
  • Usage: Connect components like processors, memory banks, I/O devices, etc.
  • Impact:
    • Scalability: Affects how well systems can expand.
    • Performance: Influences latency, throughput, and efficiency.
    • Reliability & Security: Potential for failures and data leaks.

Topologies and Routing

Topology Types

  • Regular vs. Irregular: Regular networks have a consistent structure.
  • Routing Distance: Measured as the number of hops.
  • Diameter: Maximum routing distance.
  • Bisection Bandwidth: Used to evaluate network performance; measures the minimal cut required to divide the network.

Network Types

  • Bus: Simple but not scalable for larger systems.
  • Point-to-Point: Direct links between nodes, highly expensive.
  • Crossbar: Combines features of both, used in small systems.
  • Multistage Networks: Cost-effective with multiple stages, e.g., Omega, Butterfly.

Routing Techniques

  • Deterministic Routing: Fixed path for source-destination pairs.
  • Adaptive Routing: Adjusts based on network state; can be minimal (only shortest paths) or non-minimal.
  • Avoiding Deadlock: Important in routing algorithm design.
    • Deadlock Avoidance: Use routing algorithms that prevent circular dependencies.

Flow Control

  • Circuit Switching: Sets up a path before transmission.
  • Packet Switching: Routes packets dynamically without pre-established paths.
  • Bufferless Networks: Handle packets without buffer storage, using deflection.

Performance Metrics

  • Latency: Considers routing distances and contention.
  • Throughput: Maximum rate of successful message delivery.
  • Saturation Point: Where increased load leads to higher latency.

Administrative Notes

  • Exam Details:
    • Date: December 19
    • Time: 1:00 PM to 4:00 PM
    • Location: ML F39 (backup room ML F38)
  • Grading Schedule: Final grades expected by early February; solutions to be released for homework.

Recommended Readings

  • Papers on routing techniques and interconnection network designs.
  • Suggested textbooks for deeper understanding of interconnections.

Conclusion

  • Emphasized importance of interconnects in system performance.
  • Next session will focus on on-chip networks and specific design challenges.