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RfnocNOC Getting Started Tutorial

Jul 10, 2024

RfnocNOC Getting Started Tutorial

Introduction

  • Rfnoc Network on a Chip (RfnocNOC): Provides a convenient entry point into Generation 3 USRP FPGAs for developers.
  • USRP hardware driver (UHD): Interface through Axie stream protocol.
  • Example setup: Edis Research USRP X310 with GNU Radio integration.

Prerequisites

  • Operating System: Ubuntu 16.04 (Ensure updates are installed).
  • Software for Screen Capture: VocoScreen.
  • Xilinx Vivado: Version 2015.4 required for X300/E300 series devices (download and install from Xilinx website).
  • License: Obtain and install licensing from Xilinx, configure Ethernet adapter interface (ETH0).
  • Shell Configuration: Default shell from dash to bash (dpkg-reconfigure dash).

Development Environment Setup

  • Tool: Pybombs (GNU Radio install management system).
    • Install Git, pip, and necessary libraries.
    • Install Pybombs and create prefix for development.
  • Command: uhd_images_downloader to load default USRP FPGA images.
  • Environment Variables: Set using source setup_env.sh.
  • Network Configuration: Set up network interface and configure IP addresses.

Custom Image Compilation

  • UHD Image Builder: Tool for creating custom FPGA images with selected RfnocNOC blocks.
    • GUI: Use for visual selection and building of FPGA images.
    • Command Line: Compile for specific USRP devices and targets, handle dependencies.

Creating a Custom RfnocNOC Block

Creating Skeleton Code

  • Tool: rfnoc_mod_tool for creating out-of-tree (OOT) modules and skeleton code.
  • Example Block: Gain block (multiplies incoming signal by a specified value).
  • Test Benches: Verify Verilog code with test benches using SystemVerilog, specific addresses for registers.

Hardware Description (Verilog Code)

  • Implementation: Handle settings registers, address values, and sample multiplications.
  • Pipelining: Ensures smooth processing of multiplication in FPGA.
  • Verification: Using test benches to simulate and validate functional correctness before full compile.

Compile and Run Test Benches

  • Commands: Ensure correct paths and file structures, leverage CMake and make tools for setup and testing.
  • Validation Output: Ensure tests pass, indicating correct functionality.

UHD and GNU Radio Integration

Host Code and XML Files

  • File Edits: Modify XML files to include new block details (names, registers, inputs/outputs).
  • Registration: Add RfnocNOC block to the UHD framework and build system.

GNU Radio Companion Integration

  • XML Description: Add block specifics to GNU Radio Companion XML files.
  • Scripting: Properly indent and format Python code within XML to ensure they run without errors.
  • Verifying Installation: Use make install to compile and make the blocks available in GRC.

Test Custom Blocks in GRC

  • Flow Graph Example: Use DDC block and new gain block, set appropriate sampling rates.
  • Errors and Troubleshooting: Fix common issues like buffer sizes and incorrect XML parameters.

Additional Notes

  • Troubleshooting Section: Tips for resolving common issues.
  • Resources: Links to GNU Radio resources, RfnocNOC information, and other valuable guides.