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IAS Machine Architecture Overview

Sep 8, 2025

Overview

This lecture covers the architecture and organization of the IAS (von Neumann) machine, explaining its components, registers, and the fetch-execute cycle in modern computers.

Computer Architecture vs. Organization

  • Computer architecture describes attributes affecting program execution logic.
  • Computer organization refers to how components and their interconnections realize the architecture.

IAS (von Neumann) Architecture

  • IAS architecture stores both data and instructions (programs) in memory.
  • The main components: main memory, input/output devices, arithmetic logic unit (ALU), and control unit (CPU).
  • System bus enables data transfer between memory, CPU, and I/O devices.

Computer Functions and Structure

  • Four primary functions: data processing, data storage, data movement, and data control.
  • Three levels: input/output devices, main memory, CPU; connected by system buses.

IAS Machine Memory and Instruction Structure

  • Memory has 1,000 locations, each storing data or instructions.
  • Data word: 39 bits for number, 1 bit for sign.
  • Instruction word: divided into left and right instructions, each with opcode (8 bits) and address.

Registers in the IAS Machine

  • Registers serve as temporary fast storage in the CPU.
  • Memory Buffer Register (MBR): holds data/instructions between memory and CPU.
  • Memory Address Register (MAR): holds memory addresses for read/write operations.
  • Instruction Register (IR): holds and decodes the opcode of an instruction.
  • Instruction Buffer Register (IBR): holds the right instruction from instruction word.
  • Program Counter (PC): points to the next instruction to fetch.
  • Accumulator (AC) and Multiplier Quotient (MQ): store results from ALU operations.

Fetch and Execute Cycle

  • Fetch cycle: PC fetches the instruction from memory to MBR, MAR, and IR/IBR.
  • Execute cycle: opcode is interpreted and operation is carried out by the ALU.

Key Features of IAS Machine

  • Single read/write memory for both data and instructions (stored program concept).
  • Addressable memory locations for precise data and instruction handling.
  • Sequential execution of instructions unless explicitly changed.

Programming in Hardware vs. Software

  • Hardware programming: circuits are manually wired for each operation (used in ENIAC).
  • Software programming: instructions interpreted by control unit, which signals ALU to perform operations based on opcode.

Top-Level Computer Components (IAS View)

  • CPU with registers and ALU.
  • Main memory (addressable storage for programs and data).
  • Input/output modules and ports for devices.
  • System bus for communication between components.

Key Terms & Definitions

  • Architecture — Logical structure defining computer behavior.
  • Organization — Physical arrangement and interconnection of hardware.
  • ALU (Arithmetic Logic Unit) — Processes arithmetic and logic operations.
  • Register — Fast, small storage area inside CPU.
  • Opcode — Portion of an instruction specifying the operation.
  • Program Counter (PC) — Register pointing to the next instruction.
  • Memory Buffer Register (MBR) — Temporarily stores data/instructions from memory.
  • Memory Address Register (MAR) — Holds address of memory to access.
  • Instruction Register (IR) — Holds and decodes the current instruction’s opcode.
  • Instruction Buffer Register (IBR) — Temporarily holds additional instruction data.

Action Items / Next Steps

  • Read Chapter 23 for more details (available in the library).
  • Prepare for next week’s deeper dive into the instruction fetch and execute process.