Overview
This lecture explains the architecture of the CPU, its key components, special registers, and the fetch-decode-execute cycle important for GCSE Computer Science.
CPU Overview and Role
- The CPU (Central Processing Unit) processes instructions using the fetch-decode-execute cycle.
- The CPU is considered the "brain" of the computer.
Main Components of the CPU
- The Arithmetic Logic Unit (ALU) processes mathematical operations, comparisons, and logical operations (AND, OR, NOT).
- The Control Unit decodes instructions and coordinates data movement within the CPU based on the clock cycle.
- Cache is very fast, small memory for recently or frequently used instructions.
- Registers are ultra-fast storage locations within the CPU holding instructions and data during processing.
Special Purpose Registers
- The Program Counter (PC) stores the address of the next instruction to fetch and execute.
- The Memory Address Register (MAR) temporarily holds the address of the next instruction or data to be fetched.
- The Memory Data Register (MDR) temporarily holds the actual instruction or data that has just been fetched.
- The Accumulator holds data values currently being processed or results from the ALU.
The Fetch-Decode-Execute Cycle
- At fetch: the PC sends the next instruction's address to the MAR, then increments to the next instruction.
- The instruction at the MARβs address is fetched from RAM into the MDR.
- At decode: the Control Unit interprets the fetched instruction and determines if additional data is needed.
- If needed, data is fetched into the MDR; address is passed to the MAR.
- At execute: the instruction is performed, e.g., adding a value to the Accumulator.
Register Summary Table
- Program Counter β stores addresses.
- Memory Address Register β stores addresses.
- Memory Data Register β stores instructions or data.
- Accumulator β stores data.
Key Terms & Definitions
- CPU (Central Processing Unit) β The core processor executing instructions.
- ALU (Arithmetic Logic Unit) β Handles calculations and logic operations.
- Control Unit β Decodes instructions and controls data flow.
- Cache β Small, fast memory for frequently used data.
- Register β Fast storage area within the CPU.
- Program Counter (PC) β Holds the next instruction's address.
- Memory Address Register (MAR) β Holds address to fetch from memory.
- Memory Data Register (MDR) β Holds fetched instruction/data.
- Accumulator β Holds data being calculated or results.
Action Items / Next Steps
- Review resources at mrgoff.com for revision on CPU architecture.
- Prepare for next lesson on factors affecting CPU performance.