Lecture: Computer Registers and Common Bus System
Overview
To design a basic computer, a minimum number of essential registers is required. This lecture covers the processor registers necessary for such a system, their roles, sizes, and key signals associated with them.
Processor Registers
-
Program Counter (PC)
- Size: 12 bits
- Function: Holds the address of the next instruction to be executed.
-
Address Register (AR)
- Size: 12 bits
- Function: Holds the address of a memory location; points to memory.
-
Instruction Register (IR)
- Size: 16 bits
- Function: Holds the instruction code.
-
Temporal Register (TR)
- Size: 16 bits
- Function: Holds temporary data generated during certain micro-operations; used in call/return of subroutines.
-
Data Register (DR)
- Size: 16 bits
- Function: Holds memory operands/data fetched from memory.
-
Accumulator (AC)
- Size: 16 bits
- Function: Stores intermediate results of arithmetic/logic operations.
-
Output Register (OUTR)
- Size: 8 bits
- Function: Holds the output character to be sent to the output device.
-
Input Register (INPR)
- Size: 8 bits
- Function: Holds input character from an input device; operates asynchronously.
Memory
- Size: 4096 words, each of 16 bits
Signals for Registers & Memory
-
Memory
-
Registers
- Signals: Load, Increment (INR), Clear
- Registers with Load, Increment, Clear: AR, PC, DR, AC
- Registers with Load only: IR, OUTR
- Special Case: INPR does not need any of these signals as it is connected directly to the input device and operates asynchronously.
Common Bus System
- A bus system used to connect memory and registers through specific arrangements and signals.
- Key Registers/Memory Connections:
- Registers/Memory are connected via a bus and provided with clock signals for synchronization.
- Outputs from AR directly connected to memory.
- Inputs to registers (except AC and INPR) come from the bus.
Arithmetic and Logic Unit (ALU)
- Inputs:
- From DR
- From AC
- From INPR
- Outputs:
Extra (E) Bit
- Purpose: Stores carry or overflow bits generated during arithmetic operations; used as an overflow flag.
Multiplexing via Bus Select Lines
- Multiplexing Signals: S2, S1, S0
- Based on these lines, data from specific registers can be transferred to the bus.
Example: Transferring Data from Memory to Accumulator
- Load Memory Data to Bus:
- Set select lines (S2, S1, S0) to
111
to transfer memory data to the bus.
- Load Bus Data into Data Register (DR):
- Enable load signal for DR.
- Transfer Data from DR to Accumulator (AC):
- Set select lines to
011
to transfer data from DR to the bus.
- Data from DR also moves to the ALU, which then outputs to AC upon enabling the load signal for AC.
- Note: This method involves intermediate steps for data transfer due to the absence of a direct path from memory to AC.
Conclusion
Understanding the arrangement and functionality of registers and their connection via a common bus system is crucial for designing a basic computer.