VLSI Design Flow: Step 5 - Circuit Design and Physical Design

Circuit Design

• Purpose: To develop a circuit representation based on the logic design.
• Conversion Process:
  • Boolean expressions are converted into a circuit representation
  • Considerations include speed and power requirements of the original design.
• Circuit Simulation:
  • Used to verify correctness and timing of each component in the design.
• Representation:
  • Usually expressed in a detailed circuit diagram.
  • Diagram shows circuit elements (cells, macros, gates, transistors) and their interconnections.
  • This representation is also known as a netlist.
• Tools:
  • Manual entry tools are called schematic captures.
  • Netlist can be created automatically from RTL descriptions using logic synthesis tools.

Physical Design

• Following Circuit Design, the next step is Physical Design.
• Purpose:
  • Convert the circuit representation into a geometric representation known as layout.
• Layout Components:
  • Converts each logic component into geometric representation performing the intended logic function.
  • Connections expressed as geometric patterns (typically lines in multiple layers).
• Design Rules:
  • Guidelines based on limitations of fabrication process and electrical properties of materials.
• Complexity:
  • Physical design is complex and broken down into various sub-steps.
  • Various verification and validation checks are performed during this process.
• Automation:
  • Can be completely or partially automated.
  • Layout can be generated directly from netlist using layout synthesis tools.
  • Trade-offs:
    • Synthesis tools are fast but may lead to area and performance penalties.
    • Manual layout is slower but generally has better area and performance characteristics.
• Challenges with Larger Designs:
  • Larger designs may undermine human capability to optimize globally.

Fabrication

• After Physical Design, the layout data is sent to fabrication.
• Tape Out:
  • Release of layout data is referred to as tape out.
  • Layout data is converted into photolithographic masks (one for each layer).
• Fabrication Process:
  • Masks identify areas on the wafer for material deposition, diffusion, or removal.
  • Silicon crystals are grown and sliced to produce wafers.
  • Fabrication involves deposition and diffusion steps using several masks, often dozens may be required.

Wafer and Chip Production

• Wafer size:
  • Commonly around 20 cm (8 in) in diameter.
  • Produces hundreds of chips depending on chip size.
• Industry trend towards larger wafers (30 cm or 12 in) for cost-efficiency.
• Prototyping:
  • Before mass production, prototypes are made and tested.
• Dicing and Packaging:
  • Wafers are diced into individual chips.
  • Chips are packaged to ensure functionality and specification compliance.
  • Common packages include dual inline packages, pin grid array, ball grid array, and quad flat packages.
  • Chips for multi-chip modules are not packaged; used in bare or naked form.