the fifth step in vlsa design flow is circuit design the purpose of circuit design is to develop a circuit representation based on the logic design the Boolean expressions are converted into circuit representation by taking into consideration of the speed and power requirements of the original design circuit simulation is used to verify the correctness and timing of each component the design the circuit design is usually expressed in a detailed circuit diagram this diagram shows the circuit elements like cells macros Gates or transistors and also interconnection between these elements this representation is also called as net list tools used to manually enter such descriptions are called schematic captures in many cases a netlist can be created automatically from logic or also known as RTL description by using logic synthesis tools once we have the circuit design we can go to the next step which is physical design in this step the circuit representation is converted into geometric representation known as layout layout is created by converting each logic component into a geometric representation which perform the intended logic function of the corresponding element connection between these different components are also expressed as geometric patterns typically lines in multiple layers the exact details of the layout are also depending on design rules which are guidelines based on the limitations of the fabric process and the electrical properties of the fabrication material physical design is a very complex process and therefore it is usually broken down into various substeps various verification and validation checks are performed on the layout during physical design in many cases physical design can be completely or partially automated and layouts can be generated directly from netlist by layout synthesis tools layout synthesis tools are fast but they do have an area and performance penalties which limits their use to some designs manual lay layout on the other hand is slow but have better area and performance compared to synthesized layout however this Advantage May dissipate as larger and larger designs May undermine human capabilities to comprehend and obtain globally optimization Solutions once we have the physical design we can go to fabrication since layout data is typically sent to fabrication on a tape the event of release of data is called tape out layout data is converted or factured into photo lithos graphic masks one for each layer mask identifies spaces on the wafer where certain materials need to be deposited diffused or even removed silicon crystals are grown and sliced to produce Wafers extremely small dimensions of VSA devices require that the wafer be polished near Perfection the fabrication process consists of several steps involving deposition and diffusion of various materials on the wafer during each step one mask is used and several dozens of mask may be used to complete the fabrication process a large wafer is around like 20 cm like 8 8 in in diameter and can be used to produce hundreds of chips depending on the size of the chip before the chip is mass produced a prototype is made and tested Industries is rapidly moving towards 30 cm or 12 in Wafers allowing even more chip chips per wafer leading to low cost per chip once fabrication is done finally the Wafers is fabricated and diced into individual chips in the fabrication facility each chip is then packaged and tested to ensure that it meets all the design specifications and that it functions properly chips used in printed circuit boards or pcbs are packaged in dual line dual inline packages or pin grid array or ball grid array or quad flat packages but chips used in multi-chip modules are not packaged since multichip modules used bare or naked chips