Digital Electronics Lecture: SR Flip-Flop

Introduction

• Lecture focus: SR flip-flop
  • Explanation of SR flip-flop
  • Basic circuit analysis
  • Working mechanism
  • Derivation of truth table, characteristic table, and excitation table

Basic Circuit of SR Flip-Flop

• Utilizes a two NAND gate circuit
• Similar to SR latch using NAND gates
• Terminology:
  • S* and R*: Derived using De Morgan’s theorem
  • S* = S-bar + Clock-bar
  • R* = R-bar + Clock-bar
• Clock Signal:
  • Controls data storage in the circuit

Working of SR Flip-Flop

• Set (S) = 1, Reset (R) = 0: Q = 1, Q-bar = 0
• Set (S) = 0, Reset (R) = 1: Q = 0, Q-bar = 1
• Clock Signal: Influences states
  • Clock = 0: Circuit remains in memory state
  • Clock = 1: Determines state transitions based on S and R inputs

Truth Table of SR Flip-Flop

• Describes state transitions:
  • Clock = 0: Memory state regardless of S and R
  • Clock = 1, S = 0, R = 0: Memory state
  • Clock = 1, S = 0, R = 1: Output Q = 0
  • Clock = 1, S = 1, R = 0: Output Q = 1
  • Clock = 1, S = 1, R = 1: Invalid state

Characteristic Table

• Inputs: Current state, Set (S), Reset (R)
• Output: Next state (QN+1)
• State conditions:
  • S = 0, R = 0: Memory state
  • S = 1, R = 0: Output is 1
  • S = 0, R = 1: Output is 0
  • S = 1, R = 1: Invalid state

Excitation Table

• Provides transitions for desired states
• Input combinations of QN and QN+1:
  • QN = 0, QN+1 = 0: S = Don't care
  • QN = 0, QN+1 = 1: S = 1, R = 0
  • QN = 1, QN+1 = 0: S = 0, R = 1
  • QN = 1, QN+1 = 1: R = Don't care

Applications

• Useful in flip-flop conversion and counter design
• Importance of memorizing derived tables for practical applications

Conclusion

• Understanding SR flip-flop tables helps in digital electronics concepts
• Usefulness in practical and theoretical problem-solving