welcome to digital electronics lecture series I professor it is Dholakia is going to explain you as our flip-flop in this video and to understand SR flip-flop first I will explain you the basic circuit which is there with SR flip-flop after that I'll explain you the working of SR flip-flop and after that based on its working we will try to derive its truth table its characteristic table and its excitation table in this video so let us begin this video with first agenda that is basic circuit which is there with SR flip-flop so let me draw it over here first so see this is a basic circuit which is there with SR flip-flop and if you observe this circuit closely then you'll be finding this two NAND gate circuit is SR latch by NAND gate circuit and that is what I have already explained it in my previous video right so this circuit that is equivalent to SR latch NAND gate circuit right where we can say this is as para terminal and we can say this is our star terminal why I am writing a star and R star the reason is already we have considered our input as s and R now this is what is our flip-flop so in this SR flip-flop we have clock signal over here right and with respect to clock signal we will be storing data in this circuit now I have already explained you SR latch NAND gate in my previous video so if you observe its truth table then I am directly writing that's truth table over here the reason is it will take time to derive it over here so for a derivation of this truth table you just go through my previous video see this is what the basic truth table which we have already derived in my previous video based on SR les using NAND gate now here if you observe see this NAND gate is having input s and clock right and output is a star so we can say here this s star that is NAND operation of s and clock so as per the de Morgan's theorem we can say this is a star is equals to s bar plus clock bar and if you observe this NAND gate then here input is clock and R and output is our star so we can say output R star that is our NAND operation with clock and if you apply again de Morgan's theorem over here then this will be R Bar plus clock bar see that is how a star and R star is there now let me explain you the working which is there with SR flip-flop see the basic purpose of this SR flip-flop working is as if you have s is equals to 1 means at is equals to 1 and reset is equals to 0 in that case Q should be equals to 1 and Q bar should be equals to 0 and as if R is equals to 1 and s is equals to 0 in that case Q should be 0 and Q Bar should be 1 see that is how we should be doing set reset operation at output side and one more agenda that is to store one bit data so that is how working is there now let us try to understand how all those things are happening step by step so here I will try to make a truth table of this SR flip-flop where we have input clock signal s terminal or a terminal and outputs are Q and Cuba so over here let us consider clock is equals to zero first so as if clock is equals to zero see this zero that will go to input of both of these NAND gate and as per the basic operation of NAND gate if any input is zero output will be 1 so as if clock is equals to zero and star and R star both will get one and as if both are 1 in that case you see it will go in memory state right so as if clock is equals to zero in that case no matter what our s and our our output will stay in memory state you can see it over here right now what will happen as if clock is equals to 1 now you see as if clock is equals to 1 then you see a star and R star clock is equals to 1 means clock bar is 0 right so here s star and R star that will be s bar an R star will be R Bar right so s star and R star is equals to s Bar n R Bar so now you see as if SN R both are 0 0 then aspirin R star both are 1 1 so 4 1 1 again it will stay in memory state so here this will stay in memory state now see when clock is 1 and s is 0 and R is 1 then Ashtar that will be 1 and R star that will be 0 so here we have 1 0 so that will make this state as 0 1 so Q and Q Bar that will be 0 1 over here now as if clock is equals to 1 and SNR that is 1 0 so a star and R star see both are complement of this so this will be now 0 1 so 4 0 1 Q and Q Bar is 1 0 so here I am writing it is 1 0 and as if clock is 1 and SN R both are 1 1 so you see s / H star and R star both will be 0 0 so that will go in invalid state so here there will be invalid state so this is what my output with respect to clock and s and R now I will rewrite this truth table in terms of next state so you see if I say I have this clock this s and this R and this is what QN plus 1 which is my next state and if I say my previous state of output that was QN then you see as if clock is 0 and SNR is don't care in that case it was in memory state what is the meaning of memory state it was previous state previous state was Q n so I am writing QN now if clock is 1 and SN R both are 0 0 in that case again it will stay in memory state you see so next 8 that will be previous state only as per it is there in memory state now if clock is 1 and SN R both are 0 1 in that case you see now next state will be 0 so I am writing it is 0 over here if clock is 1 and SN R that is 1 0 then next state that is 1 over here you say this and as if SN R both are 1 1 along with clock is equals to 1 then we'll be in invalid state so I am writing it is there in invalid state so this is my truth table of SR flip-flop now I'll use this truth table to derive characteristic table and excitation table so let me explain you first what will be my characteristic table so see in characteristic table will be having input to output table so in characteristic table we will be having input that is current state set and reset and my output is next state so that is Q and plus one so this is my characteristic table and in this characteristic table as per three bit is there at input side total possibilities are 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 and 1 1 1 these are my total possibilities so what will be my next state now you see if set and reset both are 0 0 in that case my output that will be memory state so it will be previous only so QN is 0 so over here QN plus 1 that should be 0 over here even you see SNR both are 0 0 so it will stay in memory state so this output that will be appearing over here right now if SNR both are 1 1 then you see it will go in invalid state so I am writing over here it will be invalid with SNR 1-1 with SNR 1 1 it will be invalid now you see as if s is 0 and R is 1 at that time QN plus 1 that is zero so s is zero R is 1 so it will be 0 s is 0 r is 1 so that will be 0 over here and when s is 1 R is 0 it will be having one output so with s is 1 R is 0 it will be having one output over here and it will be having one output over here so that is how we can make characteristic table now from characteristic table we can identify next 8 by solving this cannot map so if you make a karnaugh map for QN plus 1 then here we have input q and on and over here we have SNR so QN that is 0 and 1 over here and SN R that is 0 0 0 1 1 1 1 0 now place values of this QN plus 1 so at 0 0 0 0 at 0 0 1 it is again 0 at 0 1 0 it is 1 and over here it is invalid invalid means we can say don't care now add 1 0 0 it is 1 at 1 0 1 it is 0 at 1 1 0 it is again 1 and at 1 1 1 it is invalid so I need to say it is don't care over here for invalid it should be don't care now to simplify this I need to take this group so if you see this group QN is changing and in SN R you see as is constant right so we can say QN plus 1 that is s as per this group and second possible group is this to cover this one so as per this group you see it will be plus QN and over here R is R is 0 so Q our bar so QN plus 1 that is s plus Q n R but right now we need to make excitation table over here for excitation table here we should be having QN and QN plus 1 and over this side that should be s and right and over here with QN and QN plus 1 there are total 4 possibilities 0 0 0 1 1 0 and 1 1 now we need to identify value of SN R now you see as if Q and NQ n plus 1 both are 0 0 then in that s is 0 and R is changing so we can say it is don't care now when Q n and Q n plus 1 that is 0 1 you see so with 0 1 SN R that is 1 0 with Q and n QN plus 1 1 0 you see this possibility is there so in that SN R that is 0 1 with Q 1 and Q n plus 1 1 1 you see this possibilities are there where R is 0 and s is changing you see so we can say it is don't care so that is how we can identify excitation table of SR flip-flop now you should understand this see this characteristic table and excitation table and truth table that we are deriving because of when you have questions based on flip-flop conversion or when you have questions based on counter designing at that time we need to use this tables so one should remember all these tables which we derived over here with SR flip-flop this is what I wish you will be remembering this table and that will be definitely useful to you in future thank you so much for watching this week