Designing and Estimating Coupling Capacitor Networks with LTSpice Simulation

Introduction

• Learn how to design and estimate coupling capacitor networks using LTSpice.
• Coupling capacitor networks are always LC (inductor-capacitor) networks.

Decoupling Capacitor Networks

• Divided according to frequency.
• Equivalent circuits vary with frequency.
  • High-frequency inductance equivalent: inductors in parallel.
  • Low-frequency capacitance equivalent: capacitors in parallel.
  • Anti-resonance equivalent circuit: inductors in series and capacitors in series, parallel to each other.

Simulation Insights

• Main Circuit Voltage: Voltage of the decoupling network corresponds to impedance.
• Frequency Parts:
  • Low Frequency: Starts when impedance is low until the first resonance.
  • Mid Frequency: Between the first and last resonance, consisting of several resonances and anti-resonances.
  • High Frequency: After the last resonance.

Low Frequency Capacitive Equivalent Circuit

• All capacitors together in parallel form a line aligning with the main circuit till the first capacitor.
• Adding more capacitors can lower the low-frequency part.

Anti-Resonance Equivalent Circuit

• Inductors in series and capacitors in series parallel to inductors.
• Anti-resonances lower with effective series resistance (ESR).
• Choosing different clock frequencies can mitigate anti-resonance impact.

High Frequency Part

• Important for decoupling frequencies in the GHz range.
• Lowering inductance helps reduce impedance at high frequencies.
• More parallel inductance = lower impedance in high-frequency bandwidth.

Typical Decoupling Capacitors Network Simulation

• Four Capacitors Configuration:
  1. No coupling as reference, with interconnection parasitics included.
  2. Four capacitors of different values with parasitics.
  3. Four capacitors of the same value (100nF).
• Results:
  • Without coupling capacitors: Impedance increases significantly.
  • Different capacitor values: Multiple dips and anti-resonances.
  • Same capacitor values: Single dip, no anti-resonance above a certain frequency.

Networks with Models from Murata

• Comparison with and without coupling capacitors.
• Impact of adding inductance between capacitors.
• With zero nano-Henry inductance, certain capacitive effects prevail until 30 MHz.
• Increasing inductance between capacitors affects resonance dips and overall impedance.

Practical Recommendations

• Minimize interconnection parasitics by correctly placing decoupling capacitors.
• Consider layout changes to reduce parasitics between capacitors.
• Always simulate with parasitics for accurate results.
• Choose capacitors of either different values for varied resonance or same values for more straightforward frequency modeling.

Conclusion

• Regularly simulate and model your decoupling networks considering parasitics.
• Stay tuned for more videos on EMC topics and simulations.