after watching this video you will know how to design estimate the coupling capacitor Network by simulation L spice remember that this network is always LC Network let us start and have a successful day with EMC before we discuss full the coupling Capac network with ideal component and real components let us discuss how divide any decoupling capacitor neols according to frequency and how the equivalent circuits for each part of the cap looks like I prepare two two capacitors network with IDE source and 100 Nano and 10 nano cap with parasitics high frequency inductance equivalent circuit with both inductor in parallel low frequency capacitance equivalent circuit with both capacitors in parallel and anti-resonance equivalent ccle when we have two inductors together in series in parallel to two capacitors together in series let us see the results for now let's leave only the main circuit so we have voltage of our two capacitor Decap network but this voltage corresponds to impedance because we have only one Amper here so if we divide by current we will have impedant but the Valu will be the same so how we can divide this decoupling Network into Parts low frequeny part starts when impedance going low until first resonance then we are in the mid frequency part between first resonance and last resonance this part will consist of all resonances and all anti resonances and high frequency part after last resonance will be disart when the Cy network is intacted let us see low frequency capacit equivalent circuit we'll take all our capacitors regardless how many we have them 1 2 3 4 or let's say 10 30 doesn't matter we'll put them together in parallel and we will get this line you can see that this line align nicely with our main two capacitors circuit until the first capacitor the higher value Capac 100 Nano it's lower above 1 MHz can lower low frequency part by adding more capacitors let's see now anti-resonant equivalent circuit when we have both inductors in series and both capacitors also in series parallel to the inductors what we can see that anti-resonance equivalent circus resonance is align with our anti-resonance for our two capacitors Network the peak difference is because of our ESR this is lowering our anti resonance but also making resonance going until the eer you want to lower anti as much as you can or omit this by choosing different clock frequency at harmonics will not be at anti resonance frequency but you can have always noise same frequency as anti resonance that's why it's better to lower anti-resonance in reality in the real circuit it will be always lower because we will have some amount of resistance let us check high frequency part high frequency part is very important because it help us to the couple hundreds of megaherz and also the couple frequency in G range by lowering the inductance we will have more inductance in parallel we have lower impedance in high frequency bandwidth before we jump to next simulation let's see results together starting from our main circuit we have two dips and one Peak we have our low frequency part mid frequency part anti- resonance and high frequency part that is interactive now let us discuss more typical the coupling capacitors Network consist of four capacitors I prepared three circuits first without the cing as a reference but but with interconnection parasitics and I parasitics from I model second circuit four capacitor different values with capacitor take apart and parasitics third circuit with capacitors same value 100 let's see results only reference I divided here by current but this is not needed current is one amp this is our Circle without the coupling we can see that impedance is increasing in reference to gr and we don't have any decoupling then let's see for C the cing network and we can divide it by current to have impedance value but those will not change we can see that our low frequency part not so white and our mid you can see part is starting before 1 MHz going to 7 MHz and ending around 225 MHz and then our high frequency part starts we have four dips because we have four different capacitors values and we have three anti-resonance because between each deps pair we have one anti-resonance as you can see for four capacitor same value we have only one dip we don't have anti-resonance above 200 kilos value is lower lower frequency of its resonance and then it starts high frequency part after 4. 64 MHz and you can see that anti-resonances are higher than high frequency part of last circuit and we could choose which circuit is better according to any project design now let us discuss for capacitors decoupling network but with models download from murata website I prepar three circuits with no capacitor with four capacitors take it apart from 100 narat to 100 POF farat with derating 5 volts 50° and fed circuit with 100 narat four times in between each capup I added cap to cap inductance and this will have influence on our results for the beginning our cap to cap inductance is zero Nano Henry let's see results as previous our circuit if know the cing capacitors is inactive after 1 MHz and both circuits with four capacitor same value in different vales are capacitive until 30 MHz you can see that four capacitors same value are lower than circuit with capacitors different values the difference is not so big as previous because of internal parasitics let's see what happen when I increase the inductance between capacitors let's put very small amount 0.1 Nano Henry we can see that difference is increasing and our deep is lower for capacitors with the same value let's put now 0.5 now we got a very small pick here but our deep our resonance is much lower from 100 Mil for four cups different value to lower than and 1 M and if we put one Nan hand here we are very low with our resonance for capacitors same value but circuit with capacit different value is around 100 mohm this could have much higher difference depends on the model of capacitor for higher value capacitors the difference will be bigger because of higher parasitics the cing capacitor network is always LC Network I see parasitics Will influence this network that you cannot change then your interconnection parasitics can be minimized by placing the coupling capacitors correctly typically close to your RC and between your capacitors you can have also parasitics that you can change by changing your layout always simulate the cing capacitors with parasitics consider the cing network with capacitors different values all with Capac itors same values this concludes my video if you want to support me subscribe I will try to add more regular videos on EMC topics with simulations see you next time bye