Notes on 8086 Architecture Lecture

Introduction

• Instructor: Bharat Acharya
• Topic: 8086 Architecture
• Importance: Widely considered as a starting processor for many learners.

Basics of 8086

• 16-bit Processor:
  • Can transfer and operate on 16-bit data at a time.
  • ALU (Arithmetic Logic Unit) also works on 16 bits at once.

Architecture Overview

• Divided into Two Units:
  1. Bus Interface Unit (BIU): Upper section of the architecture.
  2. Execution Unit (EU): Lower section where instructions are executed.

Reason for Two Units: Pipelining

• Pipelining Concept:
  • 8086 fetches one instruction and executes it while fetching the next instruction simultaneously.
  • Traditional processors (like 8085) fetch and execute one instruction at a time, which is less efficient.

Key Terms

• Fetch: Retrieve an instruction from memory.
• Execute: Carry out the operation defined by the instruction.

Architecture Symbols

• Distinction of symbols in the architecture diagram (rectangular vs. others) represents arithmetic circuits.
• ALU: Performs arithmetic operations.
• Address Calculation: Physical address calculated using formula:
  • Physical Address = Segment Address * 10 + Offset Address.*

Memory Segmentation

• Memory Structure:
  • 8086 can access 2^20, which equals 1 MB of memory due to its 20-bit address bus.
  • Memory is segmented into four parts:
    1. Code Segment: Contains the program.
    2. Stack Segment: Handles the stack operations.
    3. Data Segment: Stores data.
    4. Extra Segment: Additional storage for data.

Accessing Memory

• Addresses:
  • Virtual address is provided by segment and offset addresses rather than physical addresses.
  • Registers: CS (Code Segment), IP (Instruction Pointer) are crucial for fetching instructions.

Bus Interface Unit (BIU) Functions

1. Fetch Next Instruction
2. Calculate Physical Address
3. Manage the Queue:
   • Queue size: 6 bytes (to accommodate the largest instruction of 6 bytes).
   • Instructions are fetched and stored in a queue for execution.

Queue Management

• The queue refills when two bytes are empty to optimize fetching.
• In case of branch instructions, the queue must be discarded as the previously fetched instructions might become invalid.

Execution Unit (EU) Functions

• Purpose: Executes fetched instructions.
• Process:
  1. Fetch: Instruction is fetched from the queue.
  2. Decode: Control unit translates the opcode.
  3. Execute: ALU performs the operation based on control signals.

Registers in Execution Unit

• General Purpose Registers:
  • AL, AH, BL, BH, CL, CH, DL, DH.
  • Used by programmers for data operations.
• Offset Registers: SP, SI, DI (for stack, data, extra segments).
• Operand Register: Temporary register for operations not visible to the programmer.
• Flag Register: Contains flags indicating the status of operations (e.g., zero flag, carry flag).

Conclusion and Resources

• Instructor's book on 8086 available for deeper understanding.
• Encouragement to explore more videos and keep learning.
• Request to like and subscribe to the video series.

• Note: Review segmentation and pipelining videos for better understanding.