Introduction to 8086 Architecture Concepts

hello everybody welcome I'm Bharat Acharya welcome to my video today I'm going to teach you 8086 architecture okay this there's been massive demand for this video most people learn 8086 as a processor as a starting processor So I hope this video is really helpful to you. I'm going to put in my best. It's going to be a little long video because the architecture is big and you need a lot of background to learn it. But I said I'm going to put my best. Let's see. Let's start. Now, before we start with the architecture, a few basics that you need to know. I'm sure you would know. know it but still it's my job to just cover them up. ATO86 is a 16-bit processor. What does that mean? It can transfer 16-bit data at a time. It operates on 16-bit data at a time. It has an ALI which is of 16 bits. So every activity that ATO86 does, it is capable of working on 16 bits of information in one operation. In other words, in one cycle. Okay, keep that in mind. Now let's start. Come on, we'll get the whole architecture. The first thing that you notice in the architecture is the architecture is divided into two units. Can you see that? This upper section is called as BIU. BIU stands for Bus Interface Unit. I say I think Bus Interface Unit. The lower section where all the action takes place is called the Execution Unit, EU. So your architecture has a BIU and EU. So the first question, why is the architecture divided into two units? The answer is because of Pipelining. There is a concept called as pipelining. I have covered that in a video before this. I will be giving you the link at a suggested video right now. In case you have not seen it, please check it out. You need to know that. You need to know what is pipelining to understand architecture. If you don't know, I will just give you a nutshell. Normally what a processor does, the processor before 8086, that was 8085, how it worked? It would fetch one instruction, get it inside the processor, execute it, finish it. Then go and fetch the next instruction. So it used to work on one instruction at a time. In 8086, it's not like that. It will fetch one instruction from the memory. Then, while executing that instruction, it will side-by-side fetch the next instruction. That means it's working on two instructions at a time. One instruction is being executed and the next one is being fetched in advance. What is the advantage? You are saving time. So what happens? Normal processor works like this. Fetch, execute, fetch, execute, fetch, execute. 8086 works like this. Fetch. Execute, execute, execute, execute only executions. Yes, it is fetching but that fetching happens alongside. So the way it works is the upper unit, BI unit will fetch the instruction from the memory. Then it will pass the instruction to the execution unit. While the execution unit is executing that instruction, BIU side by side will fetch the next instruction. That means the architecture is doing two things at a time. That's why the architecture is divided into two units. One unit for fetching and the other for execution. Tell me, did you understand this much? I hope you did that. Now, we learn the architecture unit by unit. But, one small thing. Before you start seeing this big diagram, I always tell my students, I teach everything from 885 up to Pentium, advanced versions, spark processors, etc. I tell everybody, no matter how big or complex the architecture looks, remember, at the end of the day, it's a processor. What does a processor do? Fetch, decode and execute instructions. So, any architecture you pick up, just... trace the path how do you fetch an instruction where is it getting decoded where is getting executed if you can trace the path you can understand every architecture in the world every micro business architecture okay so coming back when you look at this architecture you'll notice everything in the architecture is rectangular in shape except for this object and this object now both these objects have the same shape it's just drawn upside down the shape is the same now what is this symbol whenever you see A symbol like this. Remember, this is the diagram of an arithmetic circuit. There is some arithmetic taking place over here. What does it mean? These are the two operands. This is where the operation will be performed and this is where you produce the result. 2, 3, plus 5. You make 2 plus 3, the result is 5. Now, you see... Sorry about that sound. I know it's very irritating. You see two such symbols on the board. There is one here and there is one here. So both of them are arithmetic circuits. Are both of them the ALUs? No. There is only one ALU. This is the ALU. So if I write an instruction like add BL, CL. I know I have not taught you what are BL and CL but come on you can understand that my purpose over here is to add two registers. This addition will be performed by this ALU. So if the ALU is doing this addition. What is the arithmetic operation that is taking place? In place over here, there is something happening here. What is it? Here we are doing calculation of physical address. Physical address is calculated as segment address multiplied by 10 plus offset address. Do not get bogged down. down yeah yeah yeah i know you'll be wondering what is this all about you will understand just be patient and keep concentrating leave aside everything else if you're looking at this and side by side chatting no no it's not gonna work i need your concentration to understand what's going on over here now When you learn the architecture, it's assumed that you know something called as memory segmentation. Now I don't want to make that assumption. I have made a video for that too. The video is there in my channel. Just check it out. You'll get it. If possible, I'll just put a suggested link right here. now so I'm summarizing that whole video of segmentation in two three minutes you need to know that otherwise you just be mugging up the architecture if you want to understand architecture you need to know segmentation before before Now this is the entire memory supported by 8086. This is the processor, this is the memory. Memory is not inside the processor, it is a separate entity. The amount of memory that you can access depends on the address bus. 8086 has a 20 bit address bus, so it can access 2 raised to 20, that is 1 MB memory. So this entire memory size is 1 MB. Now, Just like your hard disk is of 1 TB, I'm putting a lot of things into a small discussion, okay, just pay attention. Your hard disk is 1 terabyte, as an example. That means there are 1 trillion locations. You tell me, do you know the address of every location? You want something from the hard disk. Do you know the real address of that location? 1 out of 1 trillion numbers, do you know that? No. Do you want to know that? No. Who cares? How do you access every location? For you, whatever you want to access is there in some file. Tell me, do you understand this? Everything you want to access from your computer's memory is inside some file. So for you, its address is the folder name and the file name. I repeat, folder name and file name. Once you give folder name and file name, you go to the location you want. That is a virtual address. That is not the real address. Please understand, we have given the folder name, we have given the file name. In the memory, there is no folder, there is no file. In reality, there are 1 trillion locations and every location has its own address. But you as a programmer don't want that headache. You want the simplicity of folders and files Exactly the same thing instead of having one raw memory of one MB The memory is divided into four sections called as segments They are called code segments, stack segment, data segment and extra segment. Code segment contains the program, stack segment contains the stack Data and extra segment contain random data any kind of data that you want to store in a random form is stored over here. Now If you want to access some location, hear me out clearly. Any location you want to access will have its own unique address. Its genuine address, its physical address. That physical address is 20 bits. We don't give that address. Like you, you've used your computer for so many years, but you don't know the physical address of anything. Because you as a person, as a programmer, as an end user, you don't give that address. You give a virtual address, which is a folder name and a file name. Similarly, we give... segment address and an offset address. I say again a segment address and an offset address. Segment address gives the starting address of the segment. Whatever you want to access is a part of a segment. Whatever you want to access in your computer is a part of a file. So you give the file name and then you go to the location within the file. Similarly you give the segment address which tells you where the segment begins and then you give an offset address which just tells you the location within that particular segment. So for code segment Stack segment, data segment and extra segment. CS, SS, DS and ES will give their segment addresses and IP, SP, SI and DI will give their offset addresses. This is the segment address, this is the offset address. I'll give you another simple example. There is a book. No, I'm not talking about my book. Okay, I'll talk about my book later. There is a book which has thousand pages. You want to go to page number 4564 as an example. That is its real address, the physical address, the actual address. It's 564. But you can also say it as location 64 of chapter 5. Assuming every chapter is 100 pages, chapter 5, location 64 is again 564. So chapter 5 is like your segment address, telling where you began. So it's telling where the segment began. So it's like these are chapters in a book and within that chapter, this is your offset address. So this is segment address and offset address. When you give them the processor. There is a small operation on them using a small formula and calculates the physical address. This is a formula. Physical address is calculated as segment address, segment address multiplied by 10 plus offset address. Segment address is given by CS register multiplied by 10 plus offset address given by IP. Assume the segment address is 1000 and the offset address is 2345. Come on, come on, come on. 1000. Assume. Assume CS is 1000 and IP is 2345. CS is your segment address, IP is your offset address. Combine the two. 1000 multiplied by 10 is 10000 plus 2345 becomes 12345. That is how the processor calculates the physical address. Let's do some examples. Suppose segment address is 2000, offset address is 4000. What is the physical address? 2000 into 10, 20,000 plus 4000 makes it 24,000. Segment address is 5000, offset address is 5000. Physical address should be 5000 x 10,000, 50,000 plus 5000 makes it 55,000. Tell me, did you all understand this? So, this is how processor calculates the physical address. Does it need to? Of course it needs to. The real address is the physical address. You want to access a folder and a file in your computer, that's your convenience. A folder name and a file name both given by you, both chosen in such a way that you can remember them easily. Neither the folder name nor the file name is the real address. The real address is the physical address of that file, which you till now don't know. But somebody needs to calculate it. So that's calculated by the processor. That's it. This is the background I wanted you to have. I know you spent 5-7 minutes till now. Even the architecture is not started. But you needed this. Otherwise, you won't understand the architecture. Now let's start. Now you will understand the whole architecture. That's my guarantee. Okay. So. So these are the two units of the architecture. Now, you tell me. If you understood the discussion that I just said. Who needs to calculate physical address? The E or the B I mean? Who is going out to fetch instructions? EU or B.I.U? B.I.U. So, whenever EU is executing an instruction at that time, B.I.U wants to fetch the next instruction for which B.I.U needs to calculate its address. That is calculated over here in this section. So that is done by this circuit. Physical address calculated as segment address multiplied by 10 plus optional address. So do you understand what these two objects are doing in the architecture? Okay, now long time back, 19 years back when I was a student like you and when I was learning the architecture, the first time when I saw this architecture, the first thing that came to my mind was this is also an arithmetic circuit, this is also an arithmetic circuit. Then why do we have two circuits? Why not do both calculations in the same circuit? That will reduce hardware. The answer is because you want to do pipelining. We want to do two things at a time. This ALU is busy. I'm sorry about that. So why this ALU? is executing this instruction at the same time we want to fence the next instruction so the BIU will calculate the physical address if both calculations were done by the same circuit you would not be able to do both at the same time so there would be no pipeline so to do pipelining they are both independent circuits okay now so it's calculating physical address now we're going to focus on BIU we're going to stay focused on BIU for about 10 minutes and then we go to EU for 10 minutes 20 minutes i think we should be done let's see BIU what are its functions first most important Fetch the next instruction. Second, calculate the physical address. Third, manage this object called as the queue. Now we'll come to this queue, one second. Let's just quickly revise one of these. I hope you paid attention. Go on answering. CSS, SDS, CES, what are these? Code, segment, stack, segment, data, segment, extra, segment. No, these are not the segments. This is a mistake everybody makes and then they start learning the architecture because everything goes for a toss in their mind. These are not the segments. Segments are present in the memory. Okay, remember I taught you all segments are there in the memory. These are segment registers. They contain the addresses of all the segments. I repeat for the last time, they contain the addresses of all the segments. They are all 16-bit registers. CS tells where the code segment begins in the memory. SS tells the starting address of stack segment. Similarly DS for data segment, ES for extra segment. Are you clear? They give the base address, the starting address, the segment address of the four segments. IP stands for instruction pointer. It contains the offset address. It contains the offset address within the segment. So this is your code segment. Okay, come on, look here. This is your code segment. CS gives its starting address. You've done that. You've given the address. Now for every instruction, what is going to change? The segment address. or the offset address come on absolutely the offset address that means who is going to change cs or IP yes if you say in IP you understand it as every instruction goes on getting fetched IP goes on getting incremented that's how IP always points to the next instruction that's what IP is it always gives the address of the next instruction which address offset address CS gives the segment address IP gives the offset address both of them are combined over here to calculate the come Both of them are put together to calculate the physical address. This is the physical address of what? The current instruction or the next instruction? Next instruction. The address, the instruction that we are about to fetch. So both of them combined together, given to the memory, the physical address. From there, from the memory, the instruction is fetched inside. Through the data bus. I repeat, through which bus? Data bus. There are three buses. Address bus, data bus, control bus. On the address bus, we gave the address. From the control bus we gave a read signal telling that we want to fetch. The instruction will come inside the processor through the data bus. I have been saying for the last time, through the data bus. Data bus is 16 bits. Remember when we started the video, I told you 886 is a 16-bit processor. So the instruction is coming in through a 16-bit data bus. That instruction comes inside. Now, after we have fetched this instruction, are we going to execute it right now? No. This is a pipeline processor. Some execution is going on. We have fetched the next instruction in advance. That fetching in advance is called as pre-fetching. Okay, pre-fetching. Come on, you understand the word. So, instructions which have been fetched in advance, which have been pre-fetched, come and get stored into this object called a six-byte pre-fetch queue. I repeat, six-byte pre-fetch queue. What happens? All future instructions come into this queue. Queue wants to execute instructions. It will go on removing instructions one by one from the queue. As EU removes instructions, BIU fetches more instructions and puts them into the queue. Understand for the last time. BIU goes on fetching, puts them on the back side of the queue, instructions move ahead, come out to the EU. As EU removes more instructions, BIU goes on adding more instructions into the queue. Did you understand this much? Now, a few things to understand. First of all, what's the size of the queue? The queue is of 6 bytes. What does that mean? Let's see. Let's move on this side. Remember pipeline? Pipelining means while we are executing an instruction we are also fetching the next instruction. Now that's the definition. In reality what happens is this. Suppose these are instructions of a program. Currently we are executing the first instruction. While we are executing the first instruction, BIM not only fetches the next instruction, it fetches the next six bytes of the program. The next six bytes of the program. stores them into the cube. So somebody asks you how many instructions are there in the cube? No one knows. How many bytes are there in the cube? 6 bytes. 6 instructions and 6 bytes are two different things. All instructions are not of the same size. Instructions can be of 1 byte, 2 byte, 3 byte, 4 byte, 5 byte going all the way up to 6 bytes. The biggest instruction in 886 is of 6 bytes. No wonder, that's the reason why the queue is also of 6 bytes. So that it can hold the biggest possible instruction. Now in case you are wondering, how different instructions are of different sizes. I am just giving you a glimpse, an idea. This is going to help you in understanding machine language more. I have taken 3 instructions, they are of different different sizes. First instruction, move BL comma CL. What does this do? CL registers value comes into BL. BL gets the value of CL register. move BL comma 25 BL register gets the value 25 move BX comma 2000 BX register gets the value 2000 now here this is all assembly language okay we type assembly language then we give this program to an assembler the assembler converts it into machine language and puts the program into the memory and gives it to the processor for execution so we have typed in assembly language every instruction many of them works into machine language. It becomes a series of zeros and ones. The binary pattern G0, 0, 1, 1, 0, 1, 0, 1, 1, indicating the operation that we want to perform is called its opcode. I say again, it's called its opcode. So every instruction has its own unique opcode. Tell me, did you understand this much? There's an opcode for move, there's an opcode for add, there's an opcode for subtract, etc, etc. Now, hear me. There is an instruction move being a machine. This is which language? Please answer. This is assembly language. When converted into machine language, it will have an opcode. So the point I am trying to make here is there is an opcode. for move BL comma CL will there be an opcode for move BL comma 25 or for move BL come on think about it think about it will there be an opcode for move BL comma 25 or for move BL yes there is an opcode only for move BL There cannot be an opcode for move BL comma 25 because 25 is a number. If you have an opcode for move BL comma 25, you will need one more opcode for move BL comma 26. Come on, it's not rocket science. It's so obvious. You need another opcode. code for move BL comma 27. That means you require infinite opcodes just for move BL. That is not possible. One instruction cannot take away so many opcodes. So what did you understand? A number is never included in the opcode. Say this again in your mind. A number is never included in an opcode. Opcode specifies the operation. Opcode specifies registers. You can have opcodes for registers. You can have opcodes for operations. You can never have an opcode for a number. because a number has infinite options registers are limited operations are limited numbers are too many are you clear so in this instruction there is just an opcode in this instruction there is an opcode and an operand 25 is written separately as an operand in this instruction again there is an opcode and an operand so this is the smallest of these instruction only has an opcode this instruction has an opcode with an 8-bit operator but if I just any bit of this instruction as an opcode but a bigger 16 bit operands it's a 16 bit operator means two bytes this is one line so all I'm trying to make you understand is different different instructions have different different sizes some just have an awkward seven some have an awkward and an operand an 8 bit operand some of an awkward and the 16 bit operand some have two operands etc etc all I'm trying to make you understand is different instructions are of different different sizes I hope you understood that so instructions can vary from one byte to two bytes byte, 3 byte all the way up to 6 bytes. Now let's come back over here. While we are executing any instruction, the next 6 instructions or bytes, tell me, the next 6 bytes of the program are taken and stored into this object called a 6 byte queue. Tell me, did you understand this? Now should this be a queue or a stack? You know there is a difference, right? Please tell me you know that. A stack works in the manner last in first out. A queue mark works in the manner first in first out. So the order in which instructions are fetched should be the order in which they are executed. So this should be a queue. Had it been a stack, program would be fetched in this order but be executed in the reverse order. That is obviously stupid. So this is a queue. It's of six bytes because the biggest instructions are six bytes. Now let's take a few examples. Suppose they are all one byte instructions. Okay. That is the last six instructions. I hope you understand. EU was executing some instruction, the execution unit was executing some instruction. That instruction is over. EU wants a new instruction. Where will it take that instruction from? From the memo or from the queue? Yeah, from the queue because they have already been fetched. As EU goes on removing instructions, the queue will go on becoming empty. When the first instruction goes out, the remaining 5 move ahead so this pipe becomes empty. Then again this pipe will become empty. Slowly, slowly the queue will go on becoming empty. Some pipe on the other. B.I.U will have to refill the queue. When will B.I.U refill the queue? One option, very laid back option. We'll wait for the whole queue to become empty then we'll refill it. Is that a good idea? Obviously not. What does that mean? If the queue is empty and E.U now wants a new instruction, it will have to wait. Wait for instructions to be fetched. We don't want that to happen. So what happens is, the moment one byte of the queue becomes empty, B.I.U will refill the queue. Hey, no. No. If one byte of the queue is empty, B.I.U will not do anything. It will wait for two bytes to become empty to refill the queue. Why does it wait for two bytes to become empty? Come on, come on, come on, I've given you the answer. If you've paid attention to the video, I've given you the answer. Two bytes means 16 bits. 8086, yes, yes, if you aren't saying this, I'm with you, shabash. 8086 is a 16-bit processor. It can transfer 16 bits, means it can transfer two bytes in one cycle. So why should it waste two cycles? If it sees one byte is empty, it does not bother. The moment it sees two bytes are empty, it goes to the memory, fetches two bytes and puts them into the queue. So then the queue is full of instructions. Did you understand this? One last point. Okay, over here students get this down. Right now two bytes are empty. Okay, listen to me. Two bytes are empty. As per the discussion we had, B.I.U. should fetch the next two bytes and put them into the queue. That means it should fetch the next instruction. Now suppose. the forthcoming instruction is a four byte instruction if you fetch it Will you get full instruction or half instruction? Of course you will get only half So my question is, will B.I.U get this half instruction? Yes Why? This half instruction is not going to cause any problem It's not its turn right now You can't jump the queue Right now it's the turn of this instruction By the time this instruction comes over here It will be a full instruction Because the queue is of 6 bytes and the biggest instruction is of 6 bytes So my point is, while fetching BIU does not know and does not care whether the forthcoming instruction is of how many bytes. It follows a simple principle, the moment two bytes are empty, it will go and refill the queue. Tell me, did you understand this? Last thought about the queue and then we are done with BIU, we go to the next unit, queue. Pipelining. Is it a useful idea? You tell me. Is it worth doing pipelining? We are executing one instruction side by side, fetching the next instruction. Is it going to save time? Of course it's going to. That means this execution will happen non-stop because in the background, fetching is already taking place. So the good thing about pipelining is that it saves time. That's the advantage. There is a drawback of pipelining which I have discussed in my pipelining video. I had shown you the link earlier. Pipelining assumes that the program will always go in a sequential manner. Look here. We were executing instruction number 1. 2 to 7. These bytes are prefixed and kept in the queue assuming that the program will go in a sequential manner, which is true. Most of the times, programs go in a sequential manner, but not always. Suppose the first instruction decides to do a jump to location number 9. Now, after the first instruction, who should be executed? You're right, 9th, because the first instruction has jumped. But, while first was being executed, 2 to 7 are there already present in the queue, assuming program will go in a sequential manner. Since we had taken a jump, All these instructions are now valid or invalid. They are invalid. That means the instructions which have been fetched in the queue have to be discarded. That's what we say. Pipelining fails when there is a branch because it assumes program will go in a sequential manner. If there is a branch, whatever has been fetched into the queue is invalid and immediately has to be flushed, discarded, cleared. Any word you like you can use. It all means the same thing. Do not misunderstand. When I say the queue is cleared, I am not saying that we are deleting the instructions from the program. They are very much there in the program. If required, they can be fetched again. But right now, they are not required to be in the queue. So the queue gets discarded. Now what? Does pipelining stop? No. The processor goes to the new location, fetches 6 bytes, puts them back into the queue and continues pipelining as usual. Only momentarily, pipelining fails whenever there is a branch. Tell me, did you understand this? Yeah? So, that finishes the B&B. One minute recap and then we go to the E. What are the functions? Calculate physical address, transfer data with memory fetch instructions, manage the queue. Management of the queue is done by the BIA. Okay, what's the size of the queue? Come on, six bytes. Why is it six bytes? Because the biggest instruction is of six bytes. When is the queue refilled? When two bytes are empty. When is the queue discarded? Whenever there is a branch. What are CSS, DSCS? Please say this correctly, please say this correctly. What are they? Are they the segments or are they segment registers? Yes, they are segment registers. The segments are present in the memory. The segment registers are present in the processor. They contain the segment addresses of the four segments, starting addresses in very simple language. IP, instruction pointer, what does it contain? It contains the offset address. I repeat, the offset address of the next instruction. When you want to fetch instructions, we need CS and IP. CS gives the segment address, IP gives the offset address. muP combines the two to produce a physical address using the formula segment address multiplied by 10 plus offset that calculation takes place over here that's all about the BIU. Did you understand the BIU? I hope you did. okay now we come to the second unit the execution unit that is much lighter so much easier than the BIU to understand. Come on look at it. Execution unit has one track purpose to execute instructions it has nothing to do with the external world all external operations are done by BIU. Execution unit just executes instructions Now where are instructions present? They are present in the queue. Come on, give me some basics. Every instruction first of all is fetched. We have done that. Then, yeah, not executed. Between fetching and execution there is decoding. So the first thing we need to do is decode the instruction. The instructions which are fetched in the queue, one by one will enter the execution unit whenever their turn comes. So this instruction will first go to the control section. Listen carefully. We will go to the control section where it will get decoded. We have written an instruction like this. Let's say add DL comma CL. Our intention is to add DL and CL. This is assembly language. What we write is assembly language because it's easier to write. What has come is machine language. So what has come is not this beautiful statement. has come in 0011 0101 I'm just taking an example this is called a opcode so first somebody has to make sense of this opcode somebody has to understand this opcode that is called as decoding that is done by the control section once it decodes it it produces control signals you don't show them because it makes the diagram impossible to read but you gotta understand it releases control signals these control signals go everywhere in the architecture and they tell every object what operation has to be performed Okay, so first instruction are fetched then they get deported it informs everyone what has to be done And then execution takes place. Come on so simple to understand Can the ALU add? Yes, subtract, multiply, divide. It can do a lot of things So should it do whatever it feels like? No, it should do what the instruction wants But instructions are not coming in. Instructions are coming here The control unit will decode the instruction and then tell everybody what operation has to be performed I hope you understood what the control unit does. Okay? Look, control unit, control section means the same thing. Now, before we move to the DLUG, let's first understand some registers. Come on, S, P, D, P, S, I, D, I. Come on, I need some effort from you. Come on, come on, you've dealt more than half way through, 70% through. S, P, D, P, S, I, D, I, what are they? Yeah, they are registers, everything is a register. What are they? They are called offset registers. Say again, why? Offset registers. These are called segment registers. IP was an offset register for port segment. These are also offset registers for different different segments. SQ and D are offset registers for stack segment. SI is an offset register for data segment. DI is an offset register for extra segment. What do they give? They give offset addresses within those respective segments. Okay, more about that in the segmentation video. I would love to explain them right now. But then I'll just be deviating too much from the topic. As of now, I just want you to understand. they are offset registers. They give offset addresses within the segments. Okay? Now, A, B, C, D. These are your friends. If you are a sensible person, the best concentration of this video should be here. Okay? I want you to understand these registers properly. If you see yourself learning 8086 in depth, if you see yourself becoming an 8086 programmer, You need to understand these registers. These are your best friends when you're doing programs. They are called general purpose registers. I say again, general purpose registers. What are they used for? I tell you write a program to add two numbers, 4 and 5. What do you do? You first put 4 and 5 inside two registers. You add them. The answer will again come inside some register. And then you'll display that register. This is how programming is done. Okay? Now the 4 and 5 that you want to put inside two registers. Where do you put them? Are you going to put them in CS and SS? Don't be silly. They are not general registers. They have special use. They give the addresses of the segments. These are given special registers. They give offset addresses of the segments. These registers give nothing. They are given to you. They are freely available to the programmer to do programming. Did you understand? So these are the registers which you use all the time. How many registers you have? AL, AH, BL, DH, CL, CH, DL, DH are 8-bit registers. So if you want to use them as independent 8-bit registers, you have 8 registers. As you can see, 1, 2, 3, 4, 5, 6, 7. If you want to combine them and use them as 16-bit registers, they are called AX. X means a combination of 2. BX, CX, DX. Okay? So AX, BL, CH, DX, they are 16-bit registers. So you can use them as 4. 16 bit registers or as 8, 8 bit registers. Again, I'm sure you are smart enough to understand what do L and H mean. L and H means the lower byte and the higher byte. Let's say AX being a 16 bit register contains a number 1, 2, 3, 4. 1, 2, 3, 4 is a 16 bit number. 3, 4 is the lower byte, 1, 2 is the higher byte. So if you're putting 1, 2, 3, 4 in AX, that means AL contains 3, 4, AX contains 1, 2. You can use AL alone, you can use AH alone, you can use them together. Anytime they can be used as individual 8-bit registers or as a combined 16-bit register. Did you understand this? Let's play with them a little bit. Come on, look here, look here, I've done all the hard work, you just have to look. That's it, come on. Officially, we start learning instructions, okay? Move CL, 34. What am I saying? Move into CL. The value 34. So CL register gets the value 34. Is it valid? Absolutely. 34 is an 8-bit number. CL is an 8-bit register. Similarly, move CH, 12. CH gets 12. So what has happened? CH register has got 12. CL register has got 34, which means effect. CX register has got the value 1234. If you want you can do this in a single instruction by writing move CX comma 1234 CX gets the value 1234. Now if you've directly started learning 8085 you're damn lucky If you're a person who has first learned 8085 you will understand how beautiful this instruction set is 8085 was a very amateur attempt to make a processor. It had instructions like MVIF or 8-bit operations And LXI for 16-bit operations. So many programmers spend months to just sort out this conclusion. In AT86, you have one single instruction called as MOV. Everything is done by MOV, M-O-V. Whether it's 8-bit or 16-bit doesn't matter. The register name clearly indicates. CL means 8-bit, CH means 8-bit, CX means you're doing a 16-bit operation. So MOV, CX, 1, 2, 3, 4, CX register gets the value 1, 2, 3, 4. Tell me, did you understand this? Come on, some more. MOV, BL, CL. Half the people misunderstand this instruction. Move BL comma CL means BL gets the value of CL. It's like writing BL is equal to CL in C programming. Now in C programming, if you write BL is equal to CL, who gets what? BL gets the value of CL. BL is your destination, CL is your source. In any language, you first write the destination, then you write the source. So this is your destination, this is your source. So BL register gets the value from CL. If CL was 25? DL will get 25. Will 25 be removed from CL? No. It will stay in CL but will also get copied, duplicated into DL. Okay. Similar. Move BH comma CH. BH gets the value of CH. So, DH got the value of CH. DL got the value of CL which effectively means BX got the value of CX. So, it can be done in a single instruction. Move BX comma CX. Clear? Comfortable with the instructions? With the registers? Let's start with a simple program. Program to add 0, 4 and 0, 5. I'm adding two numbers. Come on, this is like the hello world of our subject. It's the easiest program a person can get. Write a program to add two numbers. I'm adding 0, 4 and 0, 5. The answer obviously is 0, 9. I want to do it using DL and CL register. The result should come in DL. Come on, first of all, we will put the number 0, 4 in DL. Move DL, 0, 4. We'll put the number 0, 5 in CL. Move CL, 0, 5. I want the result, come on people, I want the result in dl. What should I write? Add dl,cl. What will it do? dl plus cl and it will put the result in dl. Had I written add cl,cl, it would produce the same result 9, but now it will store the result in cl. So the first operand that you write is your destination. Tell me, did you understand this? Now, the same thing, we will do it in the architecture. That's it, with that you will understand the whole architecture. Come on. The first step we did was move BL,04. So BL gets the value 04. Then we did move CL,05. CL gets the value 05. Now that we did add BL,CL. Come on now. I've spent good 45-50 minutes with you. I want this answer from you now. I want the entire explanation of this instruction. Come on. Be honest. It's payback time now. I've put in this effort. Now you've got to do this yourself. At BL,CL, I want the whole working of this instruction. Okay, I am summarizing this whole video in the next two minutes. Come on, together. Where is this instruction stored? All instructions are stored in the memory. When you want to fetch this instruction, which are the registers which will come into picture? Tell me the exact working of this instruction. When this instruction's turn will come? First of all, this instruction has to be fetched. The two registers that will come into picture are CS and ID. CS will give the segment address, IP will give the offset address. Combine the two, MewP will produce the physical address. It will give the physical address to the memory, fetch this instruction from the memory through which bus? Yeah, through the data bus. This instruction has been fetched. This instruction will go into the queue right at the end of the queue. One by one, one by one, this instruction will keep moving ahead. Finally, it will come here. When it is here, it is ready for execution. Now, this instruction will first go to the control section. For what? For what? Yeah, for what? For decoding. What we have written is add BL comma CL. What has come here is not add BL comma CL. What has come here is the opcode. The opcode has to be decoded. On decoding, the control section realizes we want to add BL and CL. First of all, it will give a signal to BL to release its value 0.4. The value will come out over here. Tell me, tell me, should somebody inform BL? Of course. because the instruction could have been add AL comma CL also. How would BL dream that it has to give the value? Someone has to inform. So the control unit will inform BL to release the value 0.4. Then it will inform CL to release the value 0.4. Tell me, are you with me so far? Both the values, I told you, these are not clips from which the ALU is hanging. These are the operands. Remember the beginning of the lecture. These two are the operands. This is where the result is produced, this is where the operation is performed. So, control unit has extracted the value of 0.4 and 0.5 from B and C. Now control unit will inform the ALU that you have to add. It could have added, it could have subtracted, it could have multiplied, it could have done a lot of things. It will tell the ALU now you have to add because the instructions will add DL comma CL. ALU will add then the result will be 0.9. This result will not be floating in the bus. As soon as this result is produced, control unit will inform DL. Now, whatever is the value of this bus has to be captured. So, it will capture the value 0, 9. This is how the instruction is performed. Please tell me that you understand this. What else happened? What else happened? While this execution was going on, this unit was not simply enjoying the show. This unit was fetching the next instruction, doing the same process all over again. That's how the architecture executes. Okay? So, these are the registers. Let's play with the registers a little more. I know you understood. I know it's been a long video. Just in 3 minutes, just want you to understand it. I wanted to add 04 and 05. Answer was 09. We did it using DL and CL. The result came in DL. What happened? The lights went off. The video went on. The flashlight went off. It's working sir, nothing happened. Is the video working? Is the video working? Are you learning the second? Yes sir. So we want to add BLMCL. We want to add 04 and 05. We did it using BLMCL. Okay? Can we do it using BL and BL? Yes. Same thing. BL and BL? Yes. Using BL and BL? Yes. Using only BL? Let's try to do it using only BL. Come on, I'm just making it get a little better, that's all. How? we will put 0 for Indian move the other commands before it then instead of putting 0 5 and some other register we will directly add 0 5 come on come on That's it. When you do add DL comma 05, you're doing DL plus 05 and the result will be stored in DL. Which again means DL will get the value 9. Tell me, did you understand it? Now come on, be a good student and show me the entire working of this instruction. I'm not doing this for fun. You'll learn something new. I bet you, within a minute you'll learn something new. This instruction, when its term comes, it has to be fetched. Come on, we've done this like 3 times by now. Come on, how does it get fetched? CS and IE together combine the form of physical address, gives it to the memory. The instruction is fetched to the date hours. It will come right at the end of the queue. Did by the time you finish the work, you'll have the same result. one by one it will keep coming ahead now the instruction has reached here now tell me is there a fundamental difference between add vl comma cl and add vl comma print 05 if you paid attention throughout this video if you've been a good student you will know there is an op code for add vl comma cl there cannot be an op code for addbl,05 because 05 is a number if you have an opcode for addbl,05 you need another opcode for addbl,06 and like this you require umpteen number of opcodes only for addbl so the opcode is only addbl and 05 is an operator that's the difference this instruction only had an opcode this instruction has an opcode and an operator now you answer between the opcode and the operator which one do we decode which one do we add We will decode the opcode, we will add the operand. I say again, we will decode the opcode, we will add the operand. That is why there are two lines drawn over here. If you notice, come on, I'm not here to skip things. I want you to understand the whole diagram, so I'm doing all this. What is coming over here? The opcode, so that it can get decoded. What is coming over here? the operand so that it can take part in the operation. Did you understand it? So our instruction add bl just this part the opcode will come here the control section will understand we want to add the value of bl with some number which is going to follow this opcode so it will inform here bl will release the value 0.4 the second number will directly come over here and come on this side of the alu that is 0.5 and when it will inform the alu it has to add it will add the root the result will be 0.9 which will be put back into here So all I am trying to make you understand is if you want to add two numbers, you can do it using two registers, you can also do it using one register. Did you understand? The last part of the architecture, there is something called an operand register. This is nothing. Operand register is a temporary register. Say it again. It's a temporary register. It is not available to the programmer which means after this you will never see this register again. It's not used in programming. It's used by the processor for storing temporary values. Every processor has temporary registers which is used only by the processor. It's used in various of these things. There are truckloads of examples. I'll give you the simplest example where it is used. There is an instruction like XCF. XCF stands for exchange. Suppose I want to exchange BX and CX. The processor cannot take the value of CX and put it into BX because then it will lose the value of BX. So what does it do? It will take the value of CX, put it into a temporary register. We will take the value of BX, put it into a temporary register. into CX will take the value from the temporary register and put it into BX. So the values will be exchanged. To do this, processor needs a temporary register. Such a register which is not available to the programmer so that our values are not lost. So for such purposes, processor uses This is one example, there are umpteen examples. Just putting a simple one to make you understand. So it's not a register used by us. It's used by the processor for temporary storage. The last and final register, come on, huge topic this has been. There is something called a flag register. I have made a video for a flag register. It is there in my playlist. Check it out. It explains all the flags in detail. Here, I'm just going to give you an idea. The flag register has various flags. Each flag gives some... status about the current result. I say again, status about the current result. There is a sign flag which will tell you that the result is positive or negative. There is a zero flag which will tell you whether the result is zero or not. There is a carry flag which will tell you whether there was a carry or not. Do you understand this information will keep changing after every operation. I have done one operation, it produced a carry. Carry flag becomes one. I do another operation, it does not produce a carry. Carry flag does not stay one. Now it becomes zero. That means flags change after every operation. So the flag register contains the status of the current result. Who produces the result? ALU. So every time the ALU does an operation, it produces two things. It produces a result and it produces a status. The result goes into the appropriate register. The status goes into the flag register. That's what flag register is. It gives you the status of the result. If you want to know the result, you check out your own register. If you want to know something about the result, many a times, you are not interested in the value of the result. Simplest example I can give you is compare. When you want to compare two numbers, how does the processor compare? It just subtracts them. If the result is positive, first number is bigger. If it's negative, second number is bigger. If the result is zero, both are equal. So here, you are not interested in the value of the result. You want to know whether it's positive, whether it's negative, whether there was a carry, whether the result is zero. So for such information, you check out the flag register. I hope you understood it. So that's your whole architecture page 86. As much as I could, I have covered it in the discussion. It's so different to pieces in the class. You have this liberty of time over here. Trying to summarize everything in the video. All of this information in full depth is there in my book. I made this book after 18 years of teaching as in right. I made it right in the beginning, but it just got refined and refined, refined over the period of years. It contains everything. that a person would want to know in 8086 if you're a student of 8086 and beyond it has introduction to higher processors also 386 486 20 but mainly focused on 886 everything right from the architecture to the instruction set to the programming interfacing designing designing of the motherboard etc etc the book is available on amazon uh the link for that is given below even the soft copy in case you're not in india uh in case you just like to save paper which is a very good idea i appreciate that The software version, the Kindle version is also available. Again, the link for that is there in the description section. Check it out if you want more information about all this. This is about 250 pages. To cover all of this, I would require more than 100 videos, which obviously is not possible. So as much as possible, I'm covering up in videos, probably a few more videos of 8086 as soon as I can. I've been loving the appreciation that you're giving. Thank you so much for that. Thank you for watching the videos. And thank you for all your suggestions. I've been trying to put as many as I can into the video. The videos and it's just gonna get better. Hopefully, I hope you understood everything I hope this video was worth your while you paid a lot. You spent a lot of time on it I hope it was worth it and Keep sending me suggestions and keep watching the videos if you like it just hit the like button hit the subscribe button as you please I wish you all the best. Do well

Let's see. Let's start. Now, before we start with the architecture, a few basics that you need to know. I'm sure you would know. know it but still it's my job to just cover them up.

ATO86 is a 16-bit processor. What does that mean? It can transfer 16-bit data at a time. It operates on 16-bit data at a time. It has an ALI which is of 16 bits.

So every activity that ATO86 does, it is capable of working on 16 bits of information in one operation. In other words, in one cycle. Okay, keep that in mind.

Now let's start. Come on, we'll get the whole architecture. The first thing that you notice in the architecture is the architecture is divided into two units. Can you see that?

This upper section is called as BIU. BIU stands for Bus Interface Unit. I say I think Bus Interface Unit. The lower section where all the action takes place is called the Execution Unit, EU.

So your architecture has a BIU and EU. So the first question, why is the architecture divided into two units? The answer is because of Pipelining. There is a concept called as pipelining. I have covered that in a video before this.

I will be giving you the link at a suggested video right now. In case you have not seen it, please check it out. You need to know that.

You need to know what is pipelining to understand architecture. If you don't know, I will just give you a nutshell. Normally what a processor does, the processor before 8086, that was 8085, how it worked?

It would fetch one instruction, get it inside the processor, execute it, finish it. Then go and fetch the next instruction. So it used to work on one instruction at a time.

In 8086, it's not like that. It will fetch one instruction from the memory. Then, while executing that instruction, it will side-by-side fetch the next instruction.

That means it's working on two instructions at a time. One instruction is being executed and the next one is being fetched in advance. What is the advantage? You are saving time.

So what happens? Normal processor works like this. Fetch, execute, fetch, execute, fetch, execute. 8086 works like this. Fetch.

Execute, execute, execute, execute only executions. Yes, it is fetching but that fetching happens alongside. So the way it works is the upper unit, BI unit will fetch the instruction from the memory.

Then it will pass the instruction to the execution unit. While the execution unit is executing that instruction, BIU side by side will fetch the next instruction. That means the architecture is doing two things at a time.

That's why the architecture is divided into two units. One unit for fetching and the other for execution. Tell me, did you understand this much?

I hope you did that. Now, we learn the architecture unit by unit. But, one small thing.

Before you start seeing this big diagram, I always tell my students, I teach everything from 885 up to Pentium, advanced versions, spark processors, etc. I tell everybody, no matter how big or complex the architecture looks, remember, at the end of the day, it's a processor. What does a processor do? Fetch, decode and execute instructions.

So, any architecture you pick up, just... trace the path how do you fetch an instruction where is it getting decoded where is getting executed if you can trace the path you can understand every architecture in the world every micro business architecture okay so coming back when you look at this architecture you'll notice everything in the architecture is rectangular in shape except for this object and this object now both these objects have the same shape it's just drawn upside down the shape is the same now what is this symbol whenever you see A symbol like this. Remember, this is the diagram of an arithmetic circuit.

There is some arithmetic taking place over here. What does it mean? These are the two operands. This is where the operation will be performed and this is where you produce the result.

2, 3, plus 5. You make 2 plus 3, the result is 5. Now, you see... Sorry about that sound. I know it's very irritating.

You see two such symbols on the board. There is one here and there is one here. So both of them are arithmetic circuits.

Are both of them the ALUs? No. There is only one ALU. This is the ALU.

So if I write an instruction like add BL, CL. I know I have not taught you what are BL and CL but come on you can understand that my purpose over here is to add two registers. This addition will be performed by this ALU. So if the ALU is doing this addition.

What is the arithmetic operation that is taking place? In place over here, there is something happening here. What is it?

Here we are doing calculation of physical address. Physical address is calculated as segment address multiplied by 10 plus offset address. Do not get bogged down.

down yeah yeah yeah i know you'll be wondering what is this all about you will understand just be patient and keep concentrating leave aside everything else if you're looking at this and side by side chatting no no it's not gonna work i need your concentration to understand what's going on over here now When you learn the architecture, it's assumed that you know something called as memory segmentation. Now I don't want to make that assumption. I have made a video for that too.

The video is there in my channel. Just check it out. You'll get it.

If possible, I'll just put a suggested link right here. now so I'm summarizing that whole video of segmentation in two three minutes you need to know that otherwise you just be mugging up the architecture if you want to understand architecture you need to know segmentation before before Now this is the entire memory supported by 8086. This is the processor, this is the memory. Memory is not inside the processor, it is a separate entity. The amount of memory that you can access depends on the address bus. 8086 has a 20 bit address bus, so it can access 2 raised to 20, that is 1 MB memory.

So this entire memory size is 1 MB. Now, Just like your hard disk is of 1 TB, I'm putting a lot of things into a small discussion, okay, just pay attention. Your hard disk is 1 terabyte, as an example. That means there are 1 trillion locations. You tell me, do you know the address of every location?

You want something from the hard disk. Do you know the real address of that location? 1 out of 1 trillion numbers, do you know that?

No. Do you want to know that? No.

Who cares? How do you access every location? For you, whatever you want to access is there in some file. Tell me, do you understand this?

Everything you want to access from your computer's memory is inside some file. So for you, its address is the folder name and the file name. I repeat, folder name and file name.

Once you give folder name and file name, you go to the location you want. That is a virtual address. That is not the real address. Please understand, we have given the folder name, we have given the file name. In the memory, there is no folder, there is no file.

In reality, there are 1 trillion locations and every location has its own address. But you as a programmer don't want that headache. You want the simplicity of folders and files Exactly the same thing instead of having one raw memory of one MB The memory is divided into four sections called as segments They are called code segments, stack segment, data segment and extra segment. Code segment contains the program, stack segment contains the stack Data and extra segment contain random data any kind of data that you want to store in a random form is stored over here. Now If you want to access some location, hear me out clearly.

Any location you want to access will have its own unique address. Its genuine address, its physical address. That physical address is 20 bits. We don't give that address.

Like you, you've used your computer for so many years, but you don't know the physical address of anything. Because you as a person, as a programmer, as an end user, you don't give that address. You give a virtual address, which is a folder name and a file name. Similarly, we give...

segment address and an offset address. I say again a segment address and an offset address. Segment address gives the starting address of the segment.

Whatever you want to access is a part of a segment. Whatever you want to access in your computer is a part of a file. So you give the file name and then you go to the location within the file. Similarly you give the segment address which tells you where the segment begins and then you give an offset address which just tells you the location within that particular segment. So for code segment Stack segment, data segment and extra segment.

CS, SS, DS and ES will give their segment addresses and IP, SP, SI and DI will give their offset addresses. This is the segment address, this is the offset address. I'll give you another simple example. There is a book.

No, I'm not talking about my book. Okay, I'll talk about my book later. There is a book which has thousand pages. You want to go to page number 4564 as an example.

That is its real address, the physical address, the actual address. It's 564. But you can also say it as location 64 of chapter 5. Assuming every chapter is 100 pages, chapter 5, location 64 is again 564. So chapter 5 is like your segment address, telling where you began. So it's telling where the segment began.

So it's like these are chapters in a book and within that chapter, this is your offset address. So this is segment address and offset address. When you give them the processor. There is a small operation on them using a small formula and calculates the physical address. This is a formula.

Physical address is calculated as segment address, segment address multiplied by 10 plus offset address. Segment address is given by CS register multiplied by 10 plus offset address given by IP. Assume the segment address is 1000 and the offset address is 2345. Come on, come on, come on. 1000. Assume. Assume CS is 1000 and IP is 2345. CS is your segment address, IP is your offset address.

Combine the two. 1000 multiplied by 10 is 10000 plus 2345 becomes 12345. That is how the processor calculates the physical address. Let's do some examples.

Suppose segment address is 2000, offset address is 4000. What is the physical address? 2000 into 10, 20,000 plus 4000 makes it 24,000. Segment address is 5000, offset address is 5000. Physical address should be 5000 x 10,000, 50,000 plus 5000 makes it 55,000. Tell me, did you all understand this?

So, this is how processor calculates the physical address. Does it need to? Of course it needs to. The real address is the physical address. You want to access a folder and a file in your computer, that's your convenience.

A folder name and a file name both given by you, both chosen in such a way that you can remember them easily. Neither the folder name nor the file name is the real address. The real address is the physical address of that file, which you till now don't know. But somebody needs to calculate it. So that's calculated by the processor.

That's it. This is the background I wanted you to have. I know you spent 5-7 minutes till now. Even the architecture is not started. But you needed this.

Otherwise, you won't understand the architecture. Now let's start. Now you will understand the whole architecture.

That's my guarantee. Okay. So. So these are the two units of the architecture. Now, you tell me.

If you understood the discussion that I just said. Who needs to calculate physical address? The E or the B I mean? Who is going out to fetch instructions?

EU or B.I.U? B.I.U. So, whenever EU is executing an instruction at that time, B.I.U wants to fetch the next instruction for which B.I.U needs to calculate its address. That is calculated over here in this section.

So that is done by this circuit. Physical address calculated as segment address multiplied by 10 plus optional address. So do you understand what these two objects are doing in the architecture?

Okay, now long time back, 19 years back when I was a student like you and when I was learning the architecture, the first time when I saw this architecture, the first thing that came to my mind was this is also an arithmetic circuit, this is also an arithmetic circuit. Then why do we have two circuits? Why not do both calculations in the same circuit?

That will reduce hardware. The answer is because you want to do pipelining. We want to do two things at a time. This ALU is busy.

I'm sorry about that. So why this ALU? is executing this instruction at the same time we want to fence the next instruction so the BIU will calculate the physical address if both calculations were done by the same circuit you would not be able to do both at the same time so there would be no pipeline so to do pipelining they are both independent circuits okay now so it's calculating physical address now we're going to focus on BIU we're going to stay focused on BIU for about 10 minutes and then we go to EU for 10 minutes 20 minutes i think we should be done let's see BIU what are its functions first most important Fetch the next instruction.

Second, calculate the physical address. Third, manage this object called as the queue. Now we'll come to this queue, one second.

Let's just quickly revise one of these. I hope you paid attention. Go on answering.

CSS, SDS, CES, what are these? Code, segment, stack, segment, data, segment, extra, segment. No, these are not the segments.

This is a mistake everybody makes and then they start learning the architecture because everything goes for a toss in their mind. These are not the segments. Segments are present in the memory. Okay, remember I taught you all segments are there in the memory.

These are segment registers. They contain the addresses of all the segments. I repeat for the last time, they contain the addresses of all the segments.

They are all 16-bit registers. CS tells where the code segment begins in the memory. SS tells the starting address of stack segment.

Similarly DS for data segment, ES for extra segment. Are you clear? They give the base address, the starting address, the segment address of the four segments. IP stands for instruction pointer.

It contains the offset address. It contains the offset address within the segment. So this is your code segment. Okay, come on, look here. This is your code segment.

CS gives its starting address. You've done that. You've given the address. Now for every instruction, what is going to change? The segment address.

or the offset address come on absolutely the offset address that means who is going to change cs or IP yes if you say in IP you understand it as every instruction goes on getting fetched IP goes on getting incremented that's how IP always points to the next instruction that's what IP is it always gives the address of the next instruction which address offset address CS gives the segment address IP gives the offset address both of them are combined over here to calculate the come Both of them are put together to calculate the physical address. This is the physical address of what? The current instruction or the next instruction?

Next instruction. The address, the instruction that we are about to fetch. So both of them combined together, given to the memory, the physical address.

From there, from the memory, the instruction is fetched inside. Through the data bus. I repeat, through which bus? Data bus.

There are three buses. Address bus, data bus, control bus. On the address bus, we gave the address. From the control bus we gave a read signal telling that we want to fetch.

The instruction will come inside the processor through the data bus. I have been saying for the last time, through the data bus. Data bus is 16 bits. Remember when we started the video, I told you 886 is a 16-bit processor. So the instruction is coming in through a 16-bit data bus.

That instruction comes inside. Now, after we have fetched this instruction, are we going to execute it right now? No. This is a pipeline processor. Some execution is going on.

We have fetched the next instruction in advance. That fetching in advance is called as pre-fetching. Okay, pre-fetching.

Come on, you understand the word. So, instructions which have been fetched in advance, which have been pre-fetched, come and get stored into this object called a six-byte pre-fetch queue. I repeat, six-byte pre-fetch queue. What happens?

All future instructions come into this queue. Queue wants to execute instructions. It will go on removing instructions one by one from the queue.

As EU removes instructions, BIU fetches more instructions and puts them into the queue. Understand for the last time. BIU goes on fetching, puts them on the back side of the queue, instructions move ahead, come out to the EU. As EU removes more instructions, BIU goes on adding more instructions into the queue.

Did you understand this much? Now, a few things to understand. First of all, what's the size of the queue?

The queue is of 6 bytes. What does that mean? Let's see. Let's move on this side.

Remember pipeline? Pipelining means while we are executing an instruction we are also fetching the next instruction. Now that's the definition. In reality what happens is this.

Suppose these are instructions of a program. Currently we are executing the first instruction. While we are executing the first instruction, BIM not only fetches the next instruction, it fetches the next six bytes of the program.

The next six bytes of the program. stores them into the cube. So somebody asks you how many instructions are there in the cube?

No one knows. How many bytes are there in the cube? 6 bytes.

6 instructions and 6 bytes are two different things. All instructions are not of the same size. Instructions can be of 1 byte, 2 byte, 3 byte, 4 byte, 5 byte going all the way up to 6 bytes.

The biggest instruction in 886 is of 6 bytes. No wonder, that's the reason why the queue is also of 6 bytes. So that it can hold the biggest possible instruction. Now in case you are wondering, how different instructions are of different sizes. I am just giving you a glimpse, an idea.

This is going to help you in understanding machine language more. I have taken 3 instructions, they are of different different sizes. First instruction, move BL comma CL.

What does this do? CL registers value comes into BL. BL gets the value of CL register. move BL comma 25 BL register gets the value 25 move BX comma 2000 BX register gets the value 2000 now here this is all assembly language okay we type assembly language then we give this program to an assembler the assembler converts it into machine language and puts the program into the memory and gives it to the processor for execution so we have typed in assembly language every instruction many of them works into machine language.

It becomes a series of zeros and ones. The binary pattern G0, 0, 1, 1, 0, 1, 0, 1, 1, indicating the operation that we want to perform is called its opcode. I say again, it's called its opcode. So every instruction has its own unique opcode. Tell me, did you understand this much?

There's an opcode for move, there's an opcode for add, there's an opcode for subtract, etc, etc. Now, hear me. There is an instruction move being a machine.

This is which language? Please answer. This is assembly language. When converted into machine language, it will have an opcode.

So the point I am trying to make here is there is an opcode. for move BL comma CL will there be an opcode for move BL comma 25 or for move BL come on think about it think about it will there be an opcode for move BL comma 25 or for move BL yes there is an opcode only for move BL There cannot be an opcode for move BL comma 25 because 25 is a number. If you have an opcode for move BL comma 25, you will need one more opcode for move BL comma 26. Come on, it's not rocket science.

It's so obvious. You need another opcode. code for move BL comma 27. That means you require infinite opcodes just for move BL.

That is not possible. One instruction cannot take away so many opcodes. So what did you understand? A number is never included in the opcode. Say this again in your mind.

A number is never included in an opcode. Opcode specifies the operation. Opcode specifies registers. You can have opcodes for registers. You can have opcodes for operations.

You can never have an opcode for a number. because a number has infinite options registers are limited operations are limited numbers are too many are you clear so in this instruction there is just an opcode in this instruction there is an opcode and an operand 25 is written separately as an operand in this instruction again there is an opcode and an operand so this is the smallest of these instruction only has an opcode this instruction has an opcode with an 8-bit operator but if I just any bit of this instruction as an opcode but a bigger 16 bit operands it's a 16 bit operator means two bytes this is one line so all I'm trying to make you understand is different different instructions have different different sizes some just have an awkward seven some have an awkward and an operand an 8 bit operand some of an awkward and the 16 bit operand some have two operands etc etc all I'm trying to make you understand is different instructions are of different different sizes I hope you understood that so instructions can vary from one byte to two bytes byte, 3 byte all the way up to 6 bytes. Now let's come back over here. While we are executing any instruction, the next 6 instructions or bytes, tell me, the next 6 bytes of the program are taken and stored into this object called a 6 byte queue. Tell me, did you understand this?

Now should this be a queue or a stack? You know there is a difference, right? Please tell me you know that.

A stack works in the manner last in first out. A queue mark works in the manner first in first out. So the order in which instructions are fetched should be the order in which they are executed. So this should be a queue.

Had it been a stack, program would be fetched in this order but be executed in the reverse order. That is obviously stupid. So this is a queue. It's of six bytes because the biggest instructions are six bytes.

Now let's take a few examples. Suppose they are all one byte instructions. Okay. That is the last six instructions. I hope you understand.

EU was executing some instruction, the execution unit was executing some instruction. That instruction is over. EU wants a new instruction.

Where will it take that instruction from? From the memo or from the queue? Yeah, from the queue because they have already been fetched. As EU goes on removing instructions, the queue will go on becoming empty.

When the first instruction goes out, the remaining 5 move ahead so this pipe becomes empty. Then again this pipe will become empty. Slowly, slowly the queue will go on becoming empty.

Some pipe on the other. B.I.U will have to refill the queue. When will B.I.U refill the queue? One option, very laid back option. We'll wait for the whole queue to become empty then we'll refill it.

Is that a good idea? Obviously not. What does that mean?

If the queue is empty and E.U now wants a new instruction, it will have to wait. Wait for instructions to be fetched. We don't want that to happen. So what happens is, the moment one byte of the queue becomes empty, B.I.U will refill the queue. Hey, no.

No. If one byte of the queue is empty, B.I.U will not do anything. It will wait for two bytes to become empty to refill the queue.

Why does it wait for two bytes to become empty? Come on, come on, come on, I've given you the answer. If you've paid attention to the video, I've given you the answer. Two bytes means 16 bits.

8086, yes, yes, if you aren't saying this, I'm with you, shabash. 8086 is a 16-bit processor. It can transfer 16 bits, means it can transfer two bytes in one cycle.

So why should it waste two cycles? If it sees one byte is empty, it does not bother. The moment it sees two bytes are empty, it goes to the memory, fetches two bytes and puts them into the queue. So then the queue is full of instructions.

Did you understand this? One last point. Okay, over here students get this down.

Right now two bytes are empty. Okay, listen to me. Two bytes are empty.

As per the discussion we had, B.I.U. should fetch the next two bytes and put them into the queue. That means it should fetch the next instruction. Now suppose.

the forthcoming instruction is a four byte instruction if you fetch it Will you get full instruction or half instruction? Of course you will get only half So my question is, will B.I.U get this half instruction? Yes Why?

This half instruction is not going to cause any problem It's not its turn right now You can't jump the queue Right now it's the turn of this instruction By the time this instruction comes over here It will be a full instruction Because the queue is of 6 bytes and the biggest instruction is of 6 bytes So my point is, while fetching BIU does not know and does not care whether the forthcoming instruction is of how many bytes. It follows a simple principle, the moment two bytes are empty, it will go and refill the queue. Tell me, did you understand this?

Last thought about the queue and then we are done with BIU, we go to the next unit, queue. Pipelining. Is it a useful idea?

You tell me. Is it worth doing pipelining? We are executing one instruction side by side, fetching the next instruction. Is it going to save time? Of course it's going to.

That means this execution will happen non-stop because in the background, fetching is already taking place. So the good thing about pipelining is that it saves time. That's the advantage.

There is a drawback of pipelining which I have discussed in my pipelining video. I had shown you the link earlier. Pipelining assumes that the program will always go in a sequential manner.

Look here. We were executing instruction number 1. 2 to 7. These bytes are prefixed and kept in the queue assuming that the program will go in a sequential manner, which is true. Most of the times, programs go in a sequential manner, but not always. Suppose the first instruction decides to do a jump to location number 9. Now, after the first instruction, who should be executed?

You're right, 9th, because the first instruction has jumped. But, while first was being executed, 2 to 7 are there already present in the queue, assuming program will go in a sequential manner. Since we had taken a jump, All these instructions are now valid or invalid. They are invalid.

That means the instructions which have been fetched in the queue have to be discarded. That's what we say. Pipelining fails when there is a branch because it assumes program will go in a sequential manner.

If there is a branch, whatever has been fetched into the queue is invalid and immediately has to be flushed, discarded, cleared. Any word you like you can use. It all means the same thing. Do not misunderstand. When I say the queue is cleared, I am not saying that we are deleting the instructions from the program.

They are very much there in the program. If required, they can be fetched again. But right now, they are not required to be in the queue. So the queue gets discarded.

Now what? Does pipelining stop? No. The processor goes to the new location, fetches 6 bytes, puts them back into the queue and continues pipelining as usual.

Only momentarily, pipelining fails whenever there is a branch. Tell me, did you understand this? Yeah?

So, that finishes the B&B. One minute recap and then we go to the E. What are the functions? Calculate physical address, transfer data with memory fetch instructions, manage the queue.

Management of the queue is done by the BIA. Okay, what's the size of the queue? Come on, six bytes. Why is it six bytes? Because the biggest instruction is of six bytes.

When is the queue refilled? When two bytes are empty. When is the queue discarded? Whenever there is a branch. What are CSS, DSCS?

Please say this correctly, please say this correctly. What are they? Are they the segments or are they segment registers?

Yes, they are segment registers. The segments are present in the memory. The segment registers are present in the processor. They contain the segment addresses of the four segments, starting addresses in very simple language. IP, instruction pointer, what does it contain?

It contains the offset address. I repeat, the offset address of the next instruction. When you want to fetch instructions, we need CS and IP.

CS gives the segment address, IP gives the offset address. muP combines the two to produce a physical address using the formula segment address multiplied by 10 plus offset that calculation takes place over here that's all about the BIU. Did you understand the BIU? I hope you did. okay now we come to the second unit the execution unit that is much lighter so much easier than the BIU to understand.

Come on look at it. Execution unit has one track purpose to execute instructions it has nothing to do with the external world all external operations are done by BIU. Execution unit just executes instructions Now where are instructions present? They are present in the queue.

Come on, give me some basics. Every instruction first of all is fetched. We have done that.

Then, yeah, not executed. Between fetching and execution there is decoding. So the first thing we need to do is decode the instruction.

The instructions which are fetched in the queue, one by one will enter the execution unit whenever their turn comes. So this instruction will first go to the control section. Listen carefully.

We will go to the control section where it will get decoded. We have written an instruction like this. Let's say add DL comma CL.

Our intention is to add DL and CL. This is assembly language. What we write is assembly language because it's easier to write. What has come is machine language. So what has come is not this beautiful statement.

has come in 0011 0101 I'm just taking an example this is called a opcode so first somebody has to make sense of this opcode somebody has to understand this opcode that is called as decoding that is done by the control section once it decodes it it produces control signals you don't show them because it makes the diagram impossible to read but you gotta understand it releases control signals these control signals go everywhere in the architecture and they tell every object what operation has to be performed Okay, so first instruction are fetched then they get deported it informs everyone what has to be done And then execution takes place. Come on so simple to understand Can the ALU add? Yes, subtract, multiply, divide.

It can do a lot of things So should it do whatever it feels like? No, it should do what the instruction wants But instructions are not coming in. Instructions are coming here The control unit will decode the instruction and then tell everybody what operation has to be performed I hope you understood what the control unit does.

Okay? Look, control unit, control section means the same thing. Now, before we move to the DLUG, let's first understand some registers.

Come on, S, P, D, P, S, I, D, I. Come on, I need some effort from you. Come on, come on, you've dealt more than half way through, 70% through. S, P, D, P, S, I, D, I, what are they?

Yeah, they are registers, everything is a register. What are they? They are called offset registers. Say again, why?

Offset registers. These are called segment registers. IP was an offset register for port segment. These are also offset registers for different different segments. SQ and D are offset registers for stack segment.

SI is an offset register for data segment. DI is an offset register for extra segment. What do they give?

They give offset addresses within those respective segments. Okay, more about that in the segmentation video. I would love to explain them right now. But then I'll just be deviating too much from the topic.

As of now, I just want you to understand. they are offset registers. They give offset addresses within the segments.

Okay? Now, A, B, C, D. These are your friends. If you are a sensible person, the best concentration of this video should be here.

Okay? I want you to understand these registers properly. If you see yourself learning 8086 in depth, if you see yourself becoming an 8086 programmer, You need to understand these registers. These are your best friends when you're doing programs.

They are called general purpose registers. I say again, general purpose registers. What are they used for? I tell you write a program to add two numbers, 4 and 5. What do you do?

You first put 4 and 5 inside two registers. You add them. The answer will again come inside some register.

And then you'll display that register. This is how programming is done. Okay?

Now the 4 and 5 that you want to put inside two registers. Where do you put them? Are you going to put them in CS and SS?

Don't be silly. They are not general registers. They have special use. They give the addresses of the segments.

These are given special registers. They give offset addresses of the segments. These registers give nothing.

They are given to you. They are freely available to the programmer to do programming. Did you understand?

So these are the registers which you use all the time. How many registers you have? AL, AH, BL, DH, CL, CH, DL, DH are 8-bit registers. So if you want to use them as independent 8-bit registers, you have 8 registers. As you can see, 1, 2, 3, 4, 5, 6, 7. If you want to combine them and use them as 16-bit registers, they are called AX.

X means a combination of 2. BX, CX, DX. Okay? So AX, BL, CH, DX, they are 16-bit registers. So you can use them as 4. 16 bit registers or as 8, 8 bit registers. Again, I'm sure you are smart enough to understand what do L and H mean.

L and H means the lower byte and the higher byte. Let's say AX being a 16 bit register contains a number 1, 2, 3, 4. 1, 2, 3, 4 is a 16 bit number. 3, 4 is the lower byte, 1, 2 is the higher byte. So if you're putting 1, 2, 3, 4 in AX, that means AL contains 3, 4, AX contains 1, 2. You can use AL alone, you can use AH alone, you can use them together. Anytime they can be used as individual 8-bit registers or as a combined 16-bit register.

Did you understand this? Let's play with them a little bit. Come on, look here, look here, I've done all the hard work, you just have to look. That's it, come on.

Officially, we start learning instructions, okay? Move CL, 34. What am I saying? Move into CL. The value 34. So CL register gets the value 34. Is it valid?

Absolutely. 34 is an 8-bit number. CL is an 8-bit register.

Similarly, move CH, 12. CH gets 12. So what has happened? CH register has got 12. CL register has got 34, which means effect. CX register has got the value 1234. If you want you can do this in a single instruction by writing move CX comma 1234 CX gets the value 1234. Now if you've directly started learning 8085 you're damn lucky If you're a person who has first learned 8085 you will understand how beautiful this instruction set is 8085 was a very amateur attempt to make a processor.

It had instructions like MVIF or 8-bit operations And LXI for 16-bit operations. So many programmers spend months to just sort out this conclusion. In AT86, you have one single instruction called as MOV. Everything is done by MOV, M-O-V.

Whether it's 8-bit or 16-bit doesn't matter. The register name clearly indicates. CL means 8-bit, CH means 8-bit, CX means you're doing a 16-bit operation. So MOV, CX, 1, 2, 3, 4, CX register gets the value 1, 2, 3, 4. Tell me, did you understand this?

Come on, some more. MOV, BL, CL. Half the people misunderstand this instruction. Move BL comma CL means BL gets the value of CL.

It's like writing BL is equal to CL in C programming. Now in C programming, if you write BL is equal to CL, who gets what? BL gets the value of CL.

BL is your destination, CL is your source. In any language, you first write the destination, then you write the source. So this is your destination, this is your source.

So BL register gets the value from CL. If CL was 25? DL will get 25. Will 25 be removed from CL?

No. It will stay in CL but will also get copied, duplicated into DL. Okay. Similar. Move BH comma CH.

BH gets the value of CH. So, DH got the value of CH. DL got the value of CL which effectively means BX got the value of CX.

So, it can be done in a single instruction. Move BX comma CX. Clear?

Comfortable with the instructions? With the registers? Let's start with a simple program. Program to add 0, 4 and 0, 5. I'm adding two numbers.

Come on, this is like the hello world of our subject. It's the easiest program a person can get. Write a program to add two numbers. I'm adding 0, 4 and 0, 5. The answer obviously is 0, 9. I want to do it using DL and CL register. The result should come in DL.

Come on, first of all, we will put the number 0, 4 in DL. Move DL, 0, 4. We'll put the number 0, 5 in CL. Move CL, 0, 5. I want the result, come on people, I want the result in dl.

What should I write? Add dl,cl. What will it do?

dl plus cl and it will put the result in dl. Had I written add cl,cl, it would produce the same result 9, but now it will store the result in cl. So the first operand that you write is your destination.

Tell me, did you understand this? Now, the same thing, we will do it in the architecture. That's it, with that you will understand the whole architecture. Come on. The first step we did was move BL,04.

So BL gets the value 04. Then we did move CL,05. CL gets the value 05. Now that we did add BL,CL. Come on now. I've spent good 45-50 minutes with you. I want this answer from you now.

I want the entire explanation of this instruction. Come on. Be honest.

It's payback time now. I've put in this effort. Now you've got to do this yourself. At BL,CL, I want the whole working of this instruction.

Okay, I am summarizing this whole video in the next two minutes. Come on, together. Where is this instruction stored? All instructions are stored in the memory.

When you want to fetch this instruction, which are the registers which will come into picture? Tell me the exact working of this instruction. When this instruction's turn will come? First of all, this instruction has to be fetched.

The two registers that will come into picture are CS and ID. CS will give the segment address, IP will give the offset address. Combine the two, MewP will produce the physical address. It will give the physical address to the memory, fetch this instruction from the memory through which bus? Yeah, through the data bus.

This instruction has been fetched. This instruction will go into the queue right at the end of the queue. One by one, one by one, this instruction will keep moving ahead. Finally, it will come here. When it is here, it is ready for execution.

Now, this instruction will first go to the control section. For what? For what?

Yeah, for what? For decoding. What we have written is add BL comma CL. What has come here is not add BL comma CL.

What has come here is the opcode. The opcode has to be decoded. On decoding, the control section realizes we want to add BL and CL.

First of all, it will give a signal to BL to release its value 0.4. The value will come out over here. Tell me, tell me, should somebody inform BL? Of course.

because the instruction could have been add AL comma CL also. How would BL dream that it has to give the value? Someone has to inform.

So the control unit will inform BL to release the value 0.4. Then it will inform CL to release the value 0.4. Tell me, are you with me so far? Both the values, I told you, these are not clips from which the ALU is hanging.

These are the operands. Remember the beginning of the lecture. These two are the operands.

This is where the result is produced, this is where the operation is performed. So, control unit has extracted the value of 0.4 and 0.5 from B and C. Now control unit will inform the ALU that you have to add. It could have added, it could have subtracted, it could have multiplied, it could have done a lot of things. It will tell the ALU now you have to add because the instructions will add DL comma CL.

ALU will add then the result will be 0.9. This result will not be floating in the bus. As soon as this result is produced, control unit will inform DL.

Now, whatever is the value of this bus has to be captured. So, it will capture the value 0, 9. This is how the instruction is performed. Please tell me that you understand this.

What else happened? What else happened? While this execution was going on, this unit was not simply enjoying the show. This unit was fetching the next instruction, doing the same process all over again.

That's how the architecture executes. Okay? So, these are the registers. Let's play with the registers a little more. I know you understood.

I know it's been a long video. Just in 3 minutes, just want you to understand it. I wanted to add 04 and 05. Answer was 09. We did it using DL and CL. The result came in DL. What happened?

The lights went off. The video went on. The flashlight went off. It's working sir, nothing happened.

Is the video working? Is the video working? Are you learning the second?

Yes sir. So we want to add BLMCL. We want to add 04 and 05. We did it using BLMCL.

Okay? Can we do it using BL and BL? Yes. Same thing.

BL and BL? Yes. Using BL and BL?

Yes. Using only BL? Let's try to do it using only BL.

Come on, I'm just making it get a little better, that's all. How? we will put 0 for Indian move the other commands before it then instead of putting 0 5 and some other register we will directly add 0 5 come on come on That's it. When you do add DL comma 05, you're doing DL plus 05 and the result will be stored in DL.

Which again means DL will get the value 9. Tell me, did you understand it? Now come on, be a good student and show me the entire working of this instruction. I'm not doing this for fun. You'll learn something new.

I bet you, within a minute you'll learn something new. This instruction, when its term comes, it has to be fetched. Come on, we've done this like 3 times by now. Come on, how does it get fetched? CS and IE together combine the form of physical address, gives it to the memory.

The instruction is fetched to the date hours. It will come right at the end of the queue. Did by the time you finish the work, you'll have the same result.

one by one it will keep coming ahead now the instruction has reached here now tell me is there a fundamental difference between add vl comma cl and add vl comma print 05 if you paid attention throughout this video if you've been a good student you will know there is an op code for add vl comma cl there cannot be an op code for addbl,05 because 05 is a number if you have an opcode for addbl,05 you need another opcode for addbl,06 and like this you require umpteen number of opcodes only for addbl so the opcode is only addbl and 05 is an operator that's the difference this instruction only had an opcode this instruction has an opcode and an operator now you answer between the opcode and the operator which one do we decode which one do we add We will decode the opcode, we will add the operand. I say again, we will decode the opcode, we will add the operand. That is why there are two lines drawn over here. If you notice, come on, I'm not here to skip things. I want you to understand the whole diagram, so I'm doing all this.

What is coming over here? The opcode, so that it can get decoded. What is coming over here? the operand so that it can take part in the operation.

Did you understand it? So our instruction add bl just this part the opcode will come here the control section will understand we want to add the value of bl with some number which is going to follow this opcode so it will inform here bl will release the value 0.4 the second number will directly come over here and come on this side of the alu that is 0.5 and when it will inform the alu it has to add it will add the root the result will be 0.9 which will be put back into here So all I am trying to make you understand is if you want to add two numbers, you can do it using two registers, you can also do it using one register. Did you understand?

The last part of the architecture, there is something called an operand register. This is nothing. Operand register is a temporary register.

Say it again. It's a temporary register. It is not available to the programmer which means after this you will never see this register again.

It's not used in programming. It's used by the processor for storing temporary values. Every processor has temporary registers which is used only by the processor. It's used in various of these things.

There are truckloads of examples. I'll give you the simplest example where it is used. There is an instruction like XCF.

XCF stands for exchange. Suppose I want to exchange BX and CX. The processor cannot take the value of CX and put it into BX because then it will lose the value of BX. So what does it do?

It will take the value of CX, put it into a temporary register. We will take the value of BX, put it into a temporary register. into CX will take the value from the temporary register and put it into BX. So the values will be exchanged. To do this, processor needs a temporary register.

Such a register which is not available to the programmer so that our values are not lost. So for such purposes, processor uses This is one example, there are umpteen examples. Just putting a simple one to make you understand. So it's not a register used by us.

It's used by the processor for temporary storage. The last and final register, come on, huge topic this has been. There is something called a flag register. I have made a video for a flag register.

It is there in my playlist. Check it out. It explains all the flags in detail.

Here, I'm just going to give you an idea. The flag register has various flags. Each flag gives some...

status about the current result. I say again, status about the current result. There is a sign flag which will tell you that the result is positive or negative. There is a zero flag which will tell you whether the result is zero or not. There is a carry flag which will tell you whether there was a carry or not.

Do you understand this information will keep changing after every operation. I have done one operation, it produced a carry. Carry flag becomes one.

I do another operation, it does not produce a carry. Carry flag does not stay one. Now it becomes zero.

That means flags change after every operation. So the flag register contains the status of the current result. Who produces the result? ALU. So every time the ALU does an operation, it produces two things.

It produces a result and it produces a status. The result goes into the appropriate register. The status goes into the flag register. That's what flag register is. It gives you the status of the result.

If you want to know the result, you check out your own register. If you want to know something about the result, many a times, you are not interested in the value of the result. Simplest example I can give you is compare.

When you want to compare two numbers, how does the processor compare? It just subtracts them. If the result is positive, first number is bigger. If it's negative, second number is bigger.

If the result is zero, both are equal. So here, you are not interested in the value of the result. You want to know whether it's positive, whether it's negative, whether there was a carry, whether the result is zero.

So for such information, you check out the flag register. I hope you understood it. So that's your whole architecture page 86. As much as I could, I have covered it in the discussion. It's so different to pieces in the class.

You have this liberty of time over here. Trying to summarize everything in the video. All of this information in full depth is there in my book. I made this book after 18 years of teaching as in right.

I made it right in the beginning, but it just got refined and refined, refined over the period of years. It contains everything. that a person would want to know in 8086 if you're a student of 8086 and beyond it has introduction to higher processors also 386 486 20 but mainly focused on 886 everything right from the architecture to the instruction set to the programming interfacing designing designing of the motherboard etc etc the book is available on amazon uh the link for that is given below even the soft copy in case you're not in india uh in case you just like to save paper which is a very good idea i appreciate that The software version, the Kindle version is also available. Again, the link for that is there in the description section.

Check it out if you want more information about all this. This is about 250 pages. To cover all of this, I would require more than 100 videos, which obviously is not possible.

So as much as possible, I'm covering up in videos, probably a few more videos of 8086 as soon as I can. I've been loving the appreciation that you're giving. Thank you so much for that.

Thank you for watching the videos. And thank you for all your suggestions. I've been trying to put as many as I can into the video.

The videos and it's just gonna get better. Hopefully, I hope you understood everything I hope this video was worth your while you paid a lot. You spent a lot of time on it I hope it was worth it and Keep sending me suggestions and keep watching the videos if you like it just hit the like button hit the subscribe button as you please I wish you all the best.

Do well

Transcript for:Introduction to 8086 Architecture Concepts

Transcript for:
Introduction to 8086 Architecture Concepts